On Thu, Jul 15, 2021 at 8:14 PM Yong Wu <yong...@mediatek.com> wrote:
>
> Prepare for adding smi sub common. Only rename from smi_gen to smi_type.
> No functional change.
>
> About the current "smi_gen", we have gen1/gen2 that stand for the
> generation number for HW. I plan to add a new type(sub_common), then the
> name "gen" is not prober.
>
> Signed-off-by: Yong Wu <yong...@mediatek.com>
Reviewed-by: Ikjoon Jang <i...@chromium.org>
> ---
> drivers/memory/mtk-smi.c | 24 ++++++++++++------------
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
> index a2213452059d..ff07b14bcd66 100644
> --- a/drivers/memory/mtk-smi.c
> +++ b/drivers/memory/mtk-smi.c
> @@ -55,7 +55,7 @@
> /* All are MMU0 defaultly. Only specialize mmu1 here. */
> #define F_MMU1_LARB(larbid) (0x1 << SMI_BUS_LARB_SHIFT(larbid))
>
> -enum mtk_smi_gen {
> +enum mtk_smi_type {
> MTK_SMI_GEN1,
> MTK_SMI_GEN2
> };
> @@ -68,8 +68,8 @@ static const char * const mtk_smi_common_clks_optional[] =
> {"gals0", "gals1"};
> static const char * const mtk_smi_larb_clks_optional[] = {"gals"};
>
> struct mtk_smi_common_plat {
> - enum mtk_smi_gen gen;
> - u32 bus_sel; /* Balance some larbs to enter mmu0 or mmu1
> */
> + enum mtk_smi_type type;
> + u32 bus_sel; /* Balance some larbs to enter mmu0
> or mmu1 */
> };
>
> struct mtk_smi_larb_gen {
> @@ -402,27 +402,27 @@ static struct platform_driver mtk_smi_larb_driver = {
> };
>
> static const struct mtk_smi_common_plat mtk_smi_common_gen1 = {
> - .gen = MTK_SMI_GEN1,
> + .type = MTK_SMI_GEN1,
> };
>
> static const struct mtk_smi_common_plat mtk_smi_common_gen2 = {
> - .gen = MTK_SMI_GEN2,
> + .type = MTK_SMI_GEN2,
> };
>
> static const struct mtk_smi_common_plat mtk_smi_common_mt6779 = {
> - .gen = MTK_SMI_GEN2,
> - .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(4) |
> - F_MMU1_LARB(5) | F_MMU1_LARB(6) | F_MMU1_LARB(7),
> + .type = MTK_SMI_GEN2,
> + .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(4) |
> + F_MMU1_LARB(5) | F_MMU1_LARB(6) | F_MMU1_LARB(7),
> };
>
> static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = {
> - .gen = MTK_SMI_GEN2,
> + .type = MTK_SMI_GEN2,
> .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(5) |
> F_MMU1_LARB(7),
> };
>
> static const struct mtk_smi_common_plat mtk_smi_common_mt8192 = {
> - .gen = MTK_SMI_GEN2,
> + .type = MTK_SMI_GEN2,
> .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(5) |
> F_MMU1_LARB(6),
> };
> @@ -483,7 +483,7 @@ static int mtk_smi_common_probe(struct platform_device
> *pdev)
> * clock into emi clock domain, but for mtk smi gen2, there's no smi
> ao
> * base.
> */
> - if (common->plat->gen == MTK_SMI_GEN1) {
> + if (common->plat->type == MTK_SMI_GEN1) {
> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> common->smi_ao_base = devm_ioremap_resource(dev, res);
> if (IS_ERR(common->smi_ao_base))
> @@ -523,7 +523,7 @@ static int __maybe_unused mtk_smi_common_resume(struct
> device *dev)
> if (ret)
> return ret;
>
> - if (common->plat->gen == MTK_SMI_GEN2 && bus_sel)
> + if (common->plat->type == MTK_SMI_GEN2 && bus_sel)
> writel(bus_sel, common->base + SMI_BUS_SEL);
> return 0;
> }
> --
> 2.18.0
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