On Thu, 5 Aug 2021 at 15:35, Shameerali Kolothum Thodi <shameerali.kolothum.th...@huawei.com> wrote: > > > > > -----Original Message----- > > From: Ard Biesheuvel [mailto:a...@kernel.org] > > Sent: 05 August 2021 14:23 > > To: Shameerali Kolothum Thodi <shameerali.kolothum.th...@huawei.com> > > Cc: Linux ARM <linux-arm-ker...@lists.infradead.org>; ACPI Devel Maling List > > <linux-a...@vger.kernel.org>; Linux IOMMU > > <iommu@lists.linux-foundation.org>; Linuxarm <linux...@huawei.com>; > > Lorenzo Pieralisi <lorenzo.pieral...@arm.com>; Joerg Roedel > > <j...@8bytes.org>; Robin Murphy <robin.mur...@arm.com>; Will Deacon > > <w...@kernel.org>; wanghuiqiang <wanghuiqi...@huawei.com>; Guohanjun > > (Hanjun Guo) <guohan...@huawei.com>; Steven Price > > <steven.pr...@arm.com>; Sami Mujawar <sami.muja...@arm.com>; Jon > > Nettleton <j...@solid-run.com>; Eric Auger <eric.au...@redhat.com>; > > yangyicong <yangyic...@huawei.com> > > Subject: Re: [PATCH v7 0/9] ACPI/IORT: Support for IORT RMR node > > > > On Thu, 5 Aug 2021 at 10:10, Shameer Kolothum > > <shameerali.kolothum.th...@huawei.com> wrote: > > > > > > Hi, > > > > > > The series adds support to IORT RMR nodes specified in IORT > > > Revision E.b -ARM DEN 0049E[0]. RMR nodes are used to describe > > > memory ranges that are used by endpoints and require a unity > > > mapping in SMMU. > > > > > > We have faced issues with 3408iMR RAID controller cards which > > > fail to boot when SMMU is enabled. This is because these > > > controllers make use of host memory for various caching related > > > purposes and when SMMU is enabled the iMR firmware fails to > > > access these memory regions as there is no mapping for them. > > > IORT RMR provides a way for UEFI to describe and report these > > > memory regions so that the kernel can make a unity mapping for > > > these in SMMU. > > > > > > > Does this mean we are ignoring the RMR memory ranges, and exposing the > > entire physical address space to devices using the stream IDs in > > question? > > Nope. RMR node is used to describe the memory ranges used by end points > behind SMMU. And this information is used to create 1 : 1 mappings for those > ranges in SMMU. Anything outside those ranges will result in translation > fault(if there are no other dynamic DMA mappings). >
Excellent! It was not obvious to me from looking at the patches, so I had to ask. Thanks, Ard. > > > > > > Change History: > > > > > > v6 --> v7 > > > > > > The only change from v6 is the fix pointed out by Steve to > > > the SMMUv2 SMR bypass install in patch #8. > > > > > > Thanks to the Tested-by tags by Laurentiu with SMMUv2 and > > > Hanjun/Huiqiang with SMMUv3 for v6. I haven't added the tags > > > yet as the series still needs more review[1]. > > > > > > Feedback and tests on this series is very much appreciated. > > > > > > v5 --> v6 > > > - Addressed comments from Robin & Lorenzo. > > > : Moved iort_parse_rmr() to acpi_iort_init() from > > > iort_init_platform_devices(). > > > : Removed use of struct iort_rmr_entry during the initial > > > parse. Using struct iommu_resv_region instead. > > > : Report RMR address alignment and overlap errors, but continue. > > > : Reworked arm_smmu_init_bypass_stes() (patch # 6). > > > - Updated SMMUv2 bypass SMR code. Thanks to Jon N (patch #8). > > > - Set IOMMU protection flags(IOMMU_CACHE, IOMMU_MMIO) based > > > on Type of RMR region. Suggested by Jon N. > > > > > > Thanks, > > > Shameer > > > [0] https://developer.arm.com/documentation/den0049/latest/ > > > [1] > > https://lore.kernel.org/linux-acpi/20210716083442.1708-1-shameerali.koloth > > um.th...@huawei.com/T/#m043c95b869973a834b2fd57f3e1ed0325c84f3b7 > > > ------ > > > v4 --> v5 > > > -Added a fw_data union to struct iommu_resv_region and removed > > > struct iommu_rmr (Based on comments from Joerg/Robin). > > > -Added iommu_put_rmrs() to release mem. > > > -Thanks to Steve for verifying on SMMUv2, but not added the Tested-by > > > yet because of the above changes. > > > > > > v3 -->v4 > > > -Included the SMMUv2 SMR bypass install changes suggested by > > > Steve(patch #7) > > > -As per Robin's comments, RMR reserve implementation is now > > > more generic (patch #8) and dropped v3 patches 8 and 10. > > > -Rebase to 5.13-rc1 > > > > > > RFC v2 --> v3 > > > -Dropped RFC tag as the ACPICA header changes are now ready to be > > > part of 5.13[0]. But this series still has a dependency on that patch. > > > -Added IORT E.b related changes(node flags, _DSM function 5 checks for > > > PCIe). > > > -Changed RMR to stream id mapping from M:N to M:1 as per the spec and > > > discussion here[1]. > > > -Last two patches add support for SMMUv2(Thanks to Jon Nettleton!) > > > ------ > > > > > > Jon Nettleton (1): > > > iommu/arm-smmu: Get associated RMR info and install bypass SMR > > > > > > Shameer Kolothum (8): > > > iommu: Introduce a union to struct iommu_resv_region > > > ACPI/IORT: Add support for RMR node parsing > > > iommu/dma: Introduce generic helper to retrieve RMR info > > > ACPI/IORT: Add a helper to retrieve RMR memory regions > > > iommu/arm-smmu-v3: Introduce strtab init helper > > > iommu/arm-smmu-v3: Refactor arm_smmu_init_bypass_stes() to force > > > bypass > > > iommu/arm-smmu-v3: Get associated RMR info and install bypass STE > > > iommu/dma: Reserve any RMR regions associated with a dev > > > > > > drivers/acpi/arm64/iort.c | 172 > > +++++++++++++++++++- > > > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 76 +++++++-- > > > drivers/iommu/arm/arm-smmu/arm-smmu.c | 48 ++++++ > > > drivers/iommu/dma-iommu.c | 89 +++++++++- > > > include/linux/acpi_iort.h | 7 + > > > include/linux/dma-iommu.h | 13 ++ > > > include/linux/iommu.h | 11 ++ > > > 7 files changed, 393 insertions(+), 23 deletions(-) > > > > > > -- > > > 2.17.1 > > > > > > > > > _______________________________________________ > > > linux-arm-kernel mailing list > > > linux-arm-ker...@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu