It's been observed that plugging in a TBT3 NVME device to a port marked with ExternalFacingPort that some DMA transactions occur that are not a full page and so the DMA API attempts to use software bounce buffers instead of relying upon the IOMMU translation.
This doesn't work and leads to messaging like: swiotlb buffer is full (sz: 4096 bytes), total 0 (slots), used 0 (slots) The bounce buffers were originally set up, but torn down during the boot process. * This happens because as part of IOMMU initialization `amd_iommu_init_dma_ops` gets called and resets the global swiotlb to 0. * When late_init gets called `pci_swiotlb_late_init` `swiotlb_exit` is called and the buffers are torn down. This can be observed in the logs: ``` [ 0.407286] AMD-Vi: Extended features (0x246577efa2254afa): PPR NX GT [5] IA GA PC GA_vAPIC [ 0.407291] AMD-Vi: Interrupt remapping enabled [ 0.407292] AMD-Vi: Virtual APIC enabled [ 0.407872] software IO TLB: tearing down default memory pool ``` This series fixes the behavior of AMD IOMMU to enable swiotlb so that non-page aligned DMA goes through a bounce buffer. It also adds a message to help with debugging similar problems in the future. Mario Limonciello (2): iommu/amd: Enable swiotlb in all cases dma-iommu: Check that swiotlb is active before trying to use it drivers/iommu/amd/iommu.c | 7 ------- drivers/iommu/dma-iommu.c | 5 +++++ 2 files changed, 5 insertions(+), 7 deletions(-) -- 2.34.1 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
