On Sat, 2022-06-11 at 18:26 +0800, yf.w...@mediatek.com wrote:
> From: Yunfei Wang <yf.w...@mediatek.com>
>
> Rename MTK_IOMMU_TLB_ADDR to MTK_IOMMU_ADDR, and update
> MTK_IOMMU_ADDR
> definition for better generality.
Comment more about why you need this.
Prepare for supporting TTBR up to 35bit which also need this macro.
Currently it is dma_addr_t while ttbr is phys_addr_t, thus change the
type to "unsigned long long" for generality.
Anyway,
Reviewed-by: Yong Wu <yong...@mediatek.com>
>
> Signed-off-by: Ning Li <ning...@mediatek.com>
> Signed-off-by: Yunfei Wang <yf.w...@mediatek.com>
> ---
> drivers/iommu/mtk_iommu.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> index bb9dd92c9898..3d62399e8865 100644
> --- a/drivers/iommu/mtk_iommu.c
> +++ b/drivers/iommu/mtk_iommu.c
> @@ -265,8 +265,8 @@ static const struct iommu_ops mtk_iommu_ops;
>
> static int mtk_iommu_hw_init(const struct mtk_iommu_data *data,
> unsigned int bankid);
>
> -#define MTK_IOMMU_TLB_ADDR(iova) ({
> \
> - dma_addr_t _addr = iova; \
> +#define MTK_IOMMU_ADDR(addr) ({
> \
> + unsigned long long _addr = addr; \
> ((lower_32_bits(_addr) & GENMASK(31, 12)) |
> upper_32_bits(_addr));\
> })
>
> @@ -381,8 +381,8 @@ static void
> mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size,
> writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
> base + data->plat_data->inv_sel_reg);
>
> - writel_relaxed(MTK_IOMMU_TLB_ADDR(iova), base +
> REG_MMU_INVLD_START_A);
> - writel_relaxed(MTK_IOMMU_TLB_ADDR(iova + size - 1),
> + writel_relaxed(MTK_IOMMU_ADDR(iova), base +
> REG_MMU_INVLD_START_A);
> + writel_relaxed(MTK_IOMMU_ADDR(iova + size - 1),
> base + REG_MMU_INVLD_END_A);
> writel_relaxed(F_MMU_INV_RANGE, base +
> REG_MMU_INVALIDATE);
>
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