On 21/06/16 09:49, Marcel Apfelbaum wrote:
We can't hard-wire the PCI_COMMAND_IO to 0 since virtio are(may be)
transitional devices that support both IO and MEM. Since the device
supports both modes is up to firmware/OS to choose a working mode. Once
the mode is chosen it is expected to update the command register
accordingly. This is why PCI spec has separate bits for IO/MEM . If we
dig into virtio implementation we may find that we don't care if both
bits are on and we may also be able to fix any potential problems.
If every byte is important for ipxe you may leave the patches out,
consciously creating an "unfriendly" driver (QEMU will create an
io-region for that and will have some 'if' statements with politically
correct comments: "Some drivers enable IO even if .." :) )
Bottom line, I would add the patches but definitely there are not a must.
I hope I helped,
Thanks for the input!
If the current code would potentially cause problems for the virtio host
side (in current or older implementations), then we should definitely
add the patches to iPXE.
Looking at the current hw/virtio/virtio-pci.c in qemu: it seems to react
to only the PCI_COMMAND_MASTER bit of PCI_COMMAND anyway. Does it
actually make any difference to qemu if we set both the IO and MEM bits?
Thanks,
Michael
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