Branch: refs/heads/next
Home: https://github.com/siemens/jailhouse
Commit: bfcc5200759e250ff80e39ec5dfc636699de201d
https://github.com/siemens/jailhouse/commit/bfcc5200759e250ff80e39ec5dfc636699de201d
Author: Jan Kiszka <[email protected]>
Date: 2016-12-23 (Fri, 23 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm/gic-v3.c
Log Message:
-----------
arm-common: Simplify irqchip cpu_reset regarding shutdown
Since e69075455bd1, shutdowns only take place when all non-root cells
are destroyed already. Account for this in cpu_reset irqchip callbacks.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 47863900a50ec4e33b3e693cd7d3157a6571a76d
https://github.com/siemens/jailhouse/commit/47863900a50ec4e33b3e693cd7d3157a6571a76d
Author: Jan Kiszka <[email protected]>
Date: 2016-12-23 (Fri, 23 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm/include/asm/percpu.h
M hypervisor/arch/arm64/include/asm/percpu.h
Log Message:
-----------
arm-common: Only shut down per-cpu part of GICv2 if it is initialized
Analogously to GICv3, make sure we do not attempt to restore the
physical per-cpu GICv2 state on shutdown if we didn't initialize it yet.
Could cause state corruptions on early setup errors otherwise.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 319aafc85e050f4c471d35645e49c2bf6afc485c
https://github.com/siemens/jailhouse/commit/319aafc85e050f4c471d35645e49c2bf6afc485c
Author: Jan Kiszka <[email protected]>
Date: 2016-12-23 (Fri, 23 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm-common/include/asm/irqchip.h
M hypervisor/arch/arm-common/irqchip.c
M hypervisor/arch/arm/gic-v3.c
Log Message:
-----------
arm-common: Split up irqchip cpu_reset and cpu_shutdown handlers
There is actually not overlap between both, the code currently shared
should not be executed during shutdown. Fix this by creating a separate
irqchip callback for pre-cpu shutdown and move related parts over from
cpu_reset handlers.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 89e20b3963fdb4f6a59da1ee4b0e79ae87be2d86
https://github.com/siemens/jailhouse/commit/89e20b3963fdb4f6a59da1ee4b0e79ae87be2d86
Author: Jan Kiszka <[email protected]>
Date: 2016-12-23 (Fri, 23 Dec 2016)
Changed paths:
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm/gic-v3.c
Log Message:
-----------
arm-common: Simplify PPI deactivation on CPU reset
Physical priority drop is already performed on interrupt reception. The
virtual CPU priority is reset in gic_clear_pending_irqs. So we can
safely use ICACTIVER to clear any active state of PPIs in the
(re-)distributor.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 2533010f95c4b624e52f803296d77a407f2737a4
https://github.com/siemens/jailhouse/commit/2533010f95c4b624e52f803296d77a407f2737a4
Author: Ralf Ramsauer <[email protected]>
Date: 2016-12-23 (Fri, 23 Dec 2016)
Changed paths:
M configs/jetson-tk1.c
Log Message:
-----------
configs: TK1: reorder memory regions
This commit reorders memory regions by ascending physical addresses,
which improves the readability of the config file.
Additionally, let's spend an additional comment on the apbmisc region,
as it is actually split into two regions:
0x70000800, size 0x64 (Chip Revision)
0x7000e864, size 0x04 (Strapping Options)
(cf. Linux's tegra124.dtsi)
No functional change.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: b1e83a5406c320a5dd41ca014ba47d1221b12182
https://github.com/siemens/jailhouse/commit/b1e83a5406c320a5dd41ca014ba47d1221b12182
Author: Ralf Ramsauer <[email protected]>
Date: 2016-12-23 (Fri, 23 Dec 2016)
Changed paths:
M scripts/include.mk
Log Message:
-----------
tooling: fix architecture choice
On ARM32 `uname -m` might return 'armv7l', on ARM64, it might return
'aarch64', which is not the correct ARCH in these cases. The correct
ARCH is arm for ARM32 bit and arm64 for ARM64.
Signed-off-by: Ralf Ramsauer <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Compare:
https://github.com/siemens/jailhouse/compare/7f3b4e679e2d...b1e83a5406c3
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