On 2017-09-01 09:58, Henning Schild wrote:
> Am Thu, 31 Aug 2017 12:51:45 +0200
> schrieb "[ext] Jan Kiszka" <[email protected]>:
> 
>> On 2017-08-31 10:08, Andreas Rollbühler wrote:
>>>
>>>
>>> On 31.08.2017 00:07, Gustavo Lima Chaves wrote:  
>>>>> +     case MSR_IA32_MISC_ENABLE:
>>>>> +             /* Allow 'Fast-Strings Enable' bit (pos. 0) changes,
>>>>> only */
>>>>> +             val = read_msr(MSR_IA32_MISC_ENABLE) &
>>>>> ~FAST_STRING_ENABLE;
>>>>> +             val |= get_wrmsr_value(&cpu_data->guest_regs) &
>>>>> FAST_STRING_ENABLE;
>>>>> Overlong line now.  
>>>> Fixed.
>>>>  
>>>>> +             /* Platform ID/Machine Info/Feature Control */
>>>>> +             [   0x10/8 ...   0x17/8 ] = 0x7f, /*
>>>>> 0x17-IA32_PLATFORM_ID */
>>>>> +             [   0x38/8 ...   0x3f/8 ] = 0xbf, /*
>>>>> 0x3a-IA32_FEATURE_CONTROL */
>>>>> +             [   0xc8/8 ...   0xcf/8 ] = 0xbf, /*
>>>>> 0xce-MSR_PLATFORM_INFO */
>>>>> I would suggest to move the comments ahead of the initialization
>>>>> into a separate line to avoid >80 characters. Maybe also use the
>>>>> form "0x17: IA32_PLATFORM_ID" to avoid melting ID and symbol
>>>>> together.  
>>>> Done.
>>>>  
>>>>> According to Andreas' finding, we seem to lack at least
>>>>> IA32_TSC_ADJUST.  
>>>> Fixed. Let's hope these iterations for missing ones don't take
>>>> long, but I know it's a very probable thing :)  
>>> Next try, this time when creating an inmate cell:
>>>
>>> FATAL: Unhandled MSR write: 600
>>> RIP: 0xffffffff8104cb64 RSP: 0xffffc90003273d08 FLAGS: 46
>>> RAX: 0x0000000000000000 RBX: 0x0000000000000002 RCX:
>>> 0x0000000000000600 RDX: 0x0000000000000000 RSI: 0x0000000000000000
>>> RDI: 0x0000000000000600 CS: 10 BASE: 0x0000000000000000 AR-BYTES:
>>> a09b EFER.LMA 1 CR0: 0x0000000080050033 CR3: 0x0000000845b3a000
>>> CR4: 0x00000000003426e0 EFER: 0x0000000000000d01
>>> Parking CPU 2 (Cell: "RootCell")  
>>
>> That's IA32_DS_AREA. We should probably get away with ignoring that
>> write as we are already disabling perf events when enabling Jailhouse
>> (see vcpu_init). Would be good to double-check that, though.
> 
> Not really related to that patch, but should the value of the global
> control msr not be saved and restored on disable? Or will Linux set it
> up again in case you want to use perf after a disable?

Linux will update the value when you flip the perf configuration.

Given that we ignore a number of writes to other regs now while
Jailhouse is running, just restoring could be dangerous. So better leave
it off.

Jan

-- 
Siemens AG, Corporate Technology, CT RDA ITP SES-DE
Corporate Competence Center Embedded Linux

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