On 2017-09-04 10:28, Lokesh Vutla wrote: > > > On Monday 04 September 2017 12:24 PM, Jan Kiszka wrote: >> On 2017-08-30 21:00, 'Lokesh Vutla' via Jailhouse wrote: >>> MPIDR can be used to compare the GICR_TYPER register >>> for redistributor base calculation. Logic is imported from >>> kernel. >>> >>> Signed-off-by: Lokesh Vutla <[email protected]> >>> --- >>> hypervisor/arch/arm-common/gic-v3.c | 13 ++++++++++--- >>> hypervisor/arch/arm/include/asm/sysregs.h | 7 +++++++ >>> hypervisor/arch/arm64/include/asm/sysregs.h | 10 ++++++++++ >>> 3 files changed, 27 insertions(+), 3 deletions(-) >>> >>> diff --git a/hypervisor/arch/arm-common/gic-v3.c >>> b/hypervisor/arch/arm-common/gic-v3.c >>> index 12ad017..7e03b64 100644 >>> --- a/hypervisor/arch/arm-common/gic-v3.c >>> +++ b/hypervisor/arch/arm-common/gic-v3.c >>> @@ -19,6 +19,7 @@ >>> #include <asm/gic.h> >>> #include <asm/irqchip.h> >>> #include <asm/setup.h> >>> +#include <asm/sysregs.h> >>> #include <asm/traps.h> >>> >>> /* >>> @@ -90,13 +91,19 @@ static void gic_cpu_reset(struct per_cpu *cpu_data) >>> static int gic_cpu_init(struct per_cpu *cpu_data) >>> { >>> unsigned int mnt_irq = system_config->platform_info.arm.maintenance_irq; >>> - u64 typer; >>> - u32 pidr; >>> + u64 typer, mpidr; >>> + u32 pidr, aff; >>> u32 cell_icc_ctlr, cell_icc_pmr, cell_icc_igrpen1; >>> u32 ich_vtr; >>> u32 ich_vmcr; >>> void *redist_base = gicr_base; >>> >>> + mpidr = cpu_data->mpidr; >>> + aff = (MPIDR_AFFINITY_LEVEL(mpidr, 3) << 24 | >>> + MPIDR_AFFINITY_LEVEL(mpidr, 2) << 16 | >>> + MPIDR_AFFINITY_LEVEL(mpidr, 1) << 8 | >>> + MPIDR_AFFINITY_LEVEL(mpidr, 0)); >>> + >>> /* Find redistributor */ >>> do { >>> pidr = mmio_read32(redist_base + GICR_PIDR2); >>> @@ -105,7 +112,7 @@ static int gic_cpu_init(struct per_cpu *cpu_data) >>> break; >>> >>> typer = mmio_read64(redist_base + GICR_TYPER); >>> - if (((typer >> 8) & 0xf) == cpu_data->cpu_id) { >>> + if ((typer >> 32) == aff) { >> >> Our GICv3 routing code seems to assume that at least aff0 is identical >> to the logical cpu_id. So this is only half the way to go. We also need >> to adjust that code to consider mpidr when dispatching routing requests, no? >> >> E.g., gic_adjust_irq_target writes the cpu_id into GICD_IROUTER. It >> should rather base this on mpidr, I suppose. > > ahh.. yes, this needs to be updated. Will update and repost patches.
Don't hurry. Let me sort out the virt_id thing first. Then we can move the GICv3 and apply your fixes. Might be simpler, and there is a chance that we avoid breaking ARM or GICv2. Jan -- Siemens AG, Corporate Technology, CT RDA ITP SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
