On 2018-04-09 16:35, Claudio Scordino wrote: > > > 2018-04-09 16:28 GMT+02:00 Lokesh Vutla <lokeshvu...@ti.com > <mailto:lokeshvu...@ti.com>>: > > > > On Monday 09 April 2018 07:53 PM, Claudio Scordino wrote: > > Signed-off-by: Claudio Scordino <clau...@evidence.eu.com > <mailto:clau...@evidence.eu.com>> > > --- > > configs/arm64/jetson-tx2.c | 492 > +++++++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 492 insertions(+) > > create mode 100644 configs/arm64/jetson-tx2.c > > > > diff --git a/configs/arm64/jetson-tx2.c b/configs/arm64/jetson-tx2.c > > new file mode 100644 > > index 0000000..0d23158 > > --- /dev/null > > +++ b/configs/arm64/jetson-tx2.c > > @@ -0,0 +1,492 @@ > > +/* > > + * Jailhouse, a Linux-based partitioning hypervisor > > + * > > + * Configuration for Jailhouse Jetson TX2 board > > + * > > + * Copyright (C) 2018 Evidence Srl > > + * > > + * Authors: > > + * Claudio Scordino <clau...@evidence.eu.com > <mailto:clau...@evidence.eu.com>> > > + * > > + * This work is licensed under the terms of the GNU GPL, version > 2. See > > + * the COPYING file in the top-level directory. > > + * > > + * NOTE: Add "mem=7808M vmalloc=512M" to the kernel command line. > > + * > > + * 2:7000:0000 inmate (size: 100:0000 = 16 MB) > > + * 2:7100:0000 hypervisor (size: 400:0000 = 64 MB) > > + * > > + */ > > + > > +#include <jailhouse/types.h> > > +#include <jailhouse/cell-config.h> > > + > > +#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0])) > > + > > +struct { > > + struct jailhouse_system header; > > + __u64 cpus[1]; > > + struct jailhouse_memory mem_regions[57]; > > + struct jailhouse_irqchip irqchips[2]; > > +} __attribute__((packed)) config = { > > + .header = { > > + .signature = JAILHOUSE_SYSTEM_SIGNATURE, > > + .revision = JAILHOUSE_CONFIG_REVISION, > > + .hypervisor_memory = { > > + .phys_start = 0x271000000, > > + .size = 0x4000000, > > + }, > > + .debug_console = { > > + .address = 0x3100000, > > + .size = 0x10000, > > + .flags = JAILHOUSE_CON1_TYPE_8250 | > > + JAILHOUSE_CON1_ACCESS_MMIO | > > + JAILHOUSE_CON1_REGDIST_4 | > > + JAILHOUSE_CON2_TYPE_ROOTPAGE, > > + }, > > + .platform_info = { > > + > > + .arm = { > > + .gicd_base = 0x03881000, > > + .gicc_base = 0x03882000, > > + .gich_base = 0x03884000, > > + .gicv_base = 0x03886000, > > + .gic_version = 2, > > + .maintenance_irq = 25, > > + } > > + }, > > + .root_cell = { > > + .name = "Jetson-TX2", > > + .cpu_set_size = sizeof(config.cpus), > > + .num_memory_regions = > ARRAY_SIZE(config.mem_regions), > > + .num_irqchips = ARRAY_SIZE(config.irqchips), > > + }, > > + }, > > + > > + .cpus = { > > + 0x39, > > + }, > > Out of curiosity, is it deliberate that cpu1,2 are skipped? > > > By default, the Linux kernel shipped by Nvidia boots with those two CPUs > disabled. > They can be easily enabled by echoing 1 into > /sys/devices/system/cpu/cpu*/online.
Are we targeting a downstream kernel here? Because upstream is not booting at all, or because it is lacking some nice-to-have feature? If upstream is booting, what is its behavior in this regard? Seems we are lacking some documentation here. Jan -- Siemens AG, Corporate Technology, CT RDA IOT SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
