On 20.03.19 13:47, 'Lokesh' via Jailhouse wrote:
From: Lokesh Vutla <[email protected]>
Add root cell configuration for TI's AM654 based platform.
Is the configuration here common for every board that embeds the am654? Or does
it also contain EVM-specific elements? In the latter case, it should be named
after the EVM.
Linux root cell DTS should reserve the following memory:
reg = <0x8 0xdfb00000 0x0 0x20500000>;
Is this at the end of RAM (on the EVM)? So a mem=X will work in that case as
well?
Signed-off-by: Lokesh Vutla <[email protected]>
---
configs/arm64/k3-am654.c | 204 +++++++++++++++++++++++++++++++++++++++
1 file changed, 204 insertions(+)
create mode 100644 configs/arm64/k3-am654.c
diff --git a/configs/arm64/k3-am654.c b/configs/arm64/k3-am654.c
new file mode 100644
index 00000000..7e15d0d5
--- /dev/null
+++ b/configs/arm64/k3-am654.c
@@ -0,0 +1,204 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Configuration for K3 based AM654 platforms
+ *
+ * Authors:
+ * Lokesh Vutla <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
+
+struct {
+ struct jailhouse_system header;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[15];
+ struct jailhouse_irqchip irqchips[5];
+} __attribute__((packed)) config = {
+ .header = {
+ .signature = JAILHOUSE_SYSTEM_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
+ .hypervisor_memory = {
+ .phys_start = 0x8dfc00000,
+ .size = 0x400000,
+ },
+ .debug_console = {
+ .address = 0x02800000,
+ .size = 0x1000,
+ .type = JAILHOUSE_CON_TYPE_8250,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ .platform_info.arm = {
+ .gic_version = 3,
+ .gicd_base = 0x01800000,
+ .gicr_base = 0x01880000,
+ .maintenance_irq = 25,
+ },
+ .root_cell = {
+ .name = "k3-am654",
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ },
+ },
+
+ .cpus = {
+ 0xf,
+ },
+
+ .mem_regions = {
+ /* ctrl mmr */ {
+ .phys_start = 0x00100000,
+ .virt_start = 0x00100000,
+ .size = 0x00020000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* GPIO */ {
+ .phys_start = 0x00600000,
+ .virt_start = 0x00600000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* serdes */ {
+ .phys_start = 0x00900000,
+ .virt_start = 0x00900000,
+ .size = 0x00012000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* Most MAIN domain peripherals */ {
+ .phys_start = 0x01000000,
+ .virt_start = 0x01000000,
+ .size = 0x0af04000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* MAIN NAVSS */ {
+ .phys_start = 0x30800000,
+ .virt_start = 0x30800000,
+ .size = 0x0bc00000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* MCUSS */ {
+ .phys_start = 0x28380000,
+ .virt_start = 0x28380000,
+ .size = 0x03880000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* MCUSS */ {
+ .phys_start = 0x40200000,
+ .virt_start = 0x40200000,
+ .size = 0x00901000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* MCUSS */ {
+ .phys_start = 0x42040000,
+ .virt_start = 0x42040000,
+ .size = 0x03ac3000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* MCUSS */ {
+ .phys_start = 0x45100000,
+ .virt_start = 0x45100000,
+ .size = 0x00c24000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* MCUSS */ {
+ .phys_start = 0x46000000,
+ .virt_start = 0x46000000,
+ .size = 0x00200000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* MCUSS */ {
+ .phys_start = 0x47000000,
+ .virt_start = 0x47000000,
+ .size = 0x00069000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RAM */ {
+ .phys_start = 0x80000000,
+ .virt_start = 0x80000000,
+ .size = 0x80000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* RAM */ {
+ .phys_start = 0x880000000,
+ .virt_start = 0x880000000,
+ .size = 0x5fb00000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* IVSHMEM shared memory region for 00:00.0 */ {
+ .phys_start = 0x8dfb00000,
+ .virt_start = 0x8dfb00000,
+ .size = 0x100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
Corresponding ivshmem device is missing, also in the Linux cell.
Jan
+ /* RAM. Reserved for inmates */ {
+ .phys_start = 0x8E0000000,
+ .virt_start = 0x8E0000000,
+ .size = 0x20000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ },
+ .irqchips = {
+ {
+ .address = 0x01800000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ {
+ .address = 0x01800000,
+ .pin_base = 160,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ {
+ .address = 0x01800000,
+ .pin_base = 288,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ {
+ .address = 0x01800000,
+ .pin_base = 416,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ {
+ .address = 0x01800000,
+ .pin_base = 544,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ },
+
+};
--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux
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