From: Luca Miccio <lucmic...@gmail.com>
Signed-off-by: Luca Miccio <lucmic...@gmail.com>
Signed-off-by: Marco Solieri <m...@xt3.it>
---
configs/arm64/zynqmp-zcu102-inmate-demo-col.c | 79 +++++++++++
configs/arm64/zynqmp-zcu102-linux-demo-col.c | 128 ++++++++++++++++++
2 files changed, 207 insertions(+)
create mode 100644 configs/arm64/zynqmp-zcu102-inmate-demo-col.c
create mode 100644 configs/arm64/zynqmp-zcu102-linux-demo-col.c
diff --git a/configs/arm64/zynqmp-zcu102-inmate-demo-col.c
b/configs/arm64/zynqmp-zcu102-inmate-demo-col.c
new file mode 100644
index 00000000..83188b27
--- /dev/null
+++ b/configs/arm64/zynqmp-zcu102-inmate-demo-col.c
@@ -0,0 +1,79 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for demo inmate on Xilinx ZynqMP ZCU102 eval board:
+ * 1 CPU, 64K RAM, 1 serial port, color range [0-7]
+ *
+ * Copyright (c) Universita' degli Studi di Modena e Reggio Emilia 2020
+ *
+ * Authors:
+ * Luca Miccio <lucmic...@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[3];
+ struct jailhouse_cache cache_regions[1];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "inmate-demo-col",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = 0,
+ .num_pci_devices = 0,
+ .num_cache_regions = ARRAY_SIZE(config.cache_regions),
+
+ .console = {
+ .address = 0xff010000,
+ .type = JAILHOUSE_CON_TYPE_XUARTPS,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0x2,
+ },
+
+ .mem_regions = {
+ /* UART */ {
+ .phys_start = 0xff010000,
+ .virt_start = 0xff010000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM */ {
+ .phys_start = 0x800600000,
+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE |
+ JAILHOUSE_MEM_COLORED,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .cache_regions = {
+ {
+ .start = 0,
+ .size = 8,
+ },
+ },
+};
diff --git a/configs/arm64/zynqmp-zcu102-linux-demo-col.c
b/configs/arm64/zynqmp-zcu102-linux-demo-col.c
new file mode 100644
index 00000000..66f12a66
--- /dev/null
+++ b/configs/arm64/zynqmp-zcu102-linux-demo-col.c
@@ -0,0 +1,128 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for linux-demo inmate on ZynqMP ZCU102:
+ * 2 CPUs, 128M RAM, serial port 2, color range [0-7]
+ *
+ * Copyright (c) Universita' degli Studi di Modena e Reggio Emilia 2020
+ *
+ * Authors:
+ * Luca Miccio <lucmic...@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[12];
+ struct jailhouse_cache cache_regions[1];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "ZynqMP-linux-demo-col",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .num_cache_regions = ARRAY_SIZE(config.cache_regions),
+ .vpci_irq_base = 140-32,
+
+ .console = {
+ .address = 0xff010000,
+ .type = JAILHOUSE_CON_TYPE_XUARTPS,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0xc,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory region for 00:01.0 */
+ JAILHOUSE_SHMEM_NET_REGIONS(0x800400000, 1),
+ /* IVSHMEM shared memory region for 00:03.0 */
+ JAILHOUSE_SHMEM_NET_REGIONS(0x800700000, 0),
+ /* UART */ {
+ .phys_start = 0xff010000,
+ .virt_start = 0xff010000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM */ {
+ .phys_start = 0x800600000,
+ .virt_start = 0,
+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* RAM */ {
+ .phys_start = 0x810000000,
+ .virt_start = 0x81000000,
+ .size = 0x8000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
+ JAILHOUSE_MEM_LOADABLE | JAILHOUSE_MEM_COLORED,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .cache_regions = {
+ {
+ .start = 0,
+ .size = 8,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0xf9010000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 1 << (54 - 32),
+ 0,
+ 0,
+ (1 << (141 - 128)) | (1 << (143 - 128))
+ },
+ },
+ },
+
+ .pci_devices = {
+ /* 00:01.0 */ {
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 1,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ /* 00:03.0 */ {
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .bdf = 3 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 4,
+ .shmem_dev_id = 0,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ },
+
+};
