From: Peng Fan <peng....@nxp.com> On i.MX8/8X family, there is only LPUART. So introduce lpuart support.
Signed-off-by: Peng Fan <peng....@nxp.com> Signed-off-by: Alice Guo <alice....@nxp.com> --- hypervisor/arch/arm-common/Kbuild | 2 +- hypervisor/arch/arm-common/dbg-write.c | 2 + hypervisor/arch/arm-common/include/asm/uart.h | 3 +- hypervisor/arch/arm-common/uart-imx-lpuart.c | 38 ++++++++++++ include/jailhouse/console.h | 1 + inmates/lib/arm-common/Makefile.lib | 2 +- inmates/lib/arm-common/uart-imx-lpuart.c | 58 +++++++++++++++++++ inmates/lib/arm-common/uart.c | 2 + 8 files changed, 105 insertions(+), 3 deletions(-) create mode 100644 hypervisor/arch/arm-common/uart-imx-lpuart.c create mode 100644 inmates/lib/arm-common/uart-imx-lpuart.c diff --git a/hypervisor/arch/arm-common/Kbuild b/hypervisor/arch/arm-common/Kbuild index 78b9e512..ab86eca6 100644 --- a/hypervisor/arch/arm-common/Kbuild +++ b/hypervisor/arch/arm-common/Kbuild @@ -16,7 +16,7 @@ ccflags-$(CONFIG_JAILHOUSE_GCOV) += -fprofile-arcs -ftest-coverage objs-y += dbg-write.o lib.o psci.o control.o paging.o mmu_cell.o setup.o objs-y += irqchip.o pci.o ivshmem.o uart-pl011.o uart-xuartps.o uart-mvebu.o -objs-y += uart-hscif.o uart-scifa.o uart-imx.o +objs-y += uart-hscif.o uart-scifa.o uart-imx.o uart-imx-lpuart.o objs-y += gic-v2.o gic-v3.o smccc.o common-objs-y = $(addprefix ../arm-common/,$(objs-y)) diff --git a/hypervisor/arch/arm-common/dbg-write.c b/hypervisor/arch/arm-common/dbg-write.c index 64dfef20..d4cd4399 100644 --- a/hypervisor/arch/arm-common/dbg-write.c +++ b/hypervisor/arch/arm-common/dbg-write.c @@ -38,6 +38,8 @@ void arch_dbg_write_init(void) uart = &uart_scifa_ops; else if (con_type == JAILHOUSE_CON_TYPE_IMX) uart = &uart_imx_ops; + else if (con_type == JAILHOUSE_CON_TYPE_IMX_LPUART) + uart = &uart_imx_lpuart_ops; if (uart) { uart->debug_console = &system_config->debug_console; diff --git a/hypervisor/arch/arm-common/include/asm/uart.h b/hypervisor/arch/arm-common/include/asm/uart.h index 9317446f..f620501d 100644 --- a/hypervisor/arch/arm-common/include/asm/uart.h +++ b/hypervisor/arch/arm-common/include/asm/uart.h @@ -11,4 +11,5 @@ */ extern struct uart_chip uart_pl011_ops, uart_xuartps_ops, uart_mvebu_ops, - uart_hscif_ops, uart_scifa_ops, uart_imx_ops; + uart_hscif_ops, uart_scifa_ops, uart_imx_ops, + uart_imx_lpuart_ops; diff --git a/hypervisor/arch/arm-common/uart-imx-lpuart.c b/hypervisor/arch/arm-common/uart-imx-lpuart.c new file mode 100644 index 00000000..aa8a0897 --- /dev/null +++ b/hypervisor/arch/arm-common/uart-imx-lpuart.c @@ -0,0 +1,38 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Copyright 2020 NXP + * + * Authors: + * Peng Fan <peng....@nxp.com> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/mmio.h> +#include <jailhouse/uart.h> + +#define UART_DATA 0x1c +#define UART_STAT 0x14 +#define STAT_TDRE (1 << 23) + +static void uart_init(struct uart_chip *chip) +{ +} + +static bool uart_is_busy(struct uart_chip *chip) +{ + return !(mmio_read32(chip->virt_base + UART_STAT) & STAT_TDRE); +} + +static void uart_write_char(struct uart_chip *chip, char c) +{ + mmio_write32(chip->virt_base + UART_DATA, c); +} + +struct uart_chip uart_imx_lpuart_ops = { + .init = uart_init, + .is_busy = uart_is_busy, + .write_char = uart_write_char, +}; diff --git a/include/jailhouse/console.h b/include/jailhouse/console.h index a6efd37a..34dd7209 100644 --- a/include/jailhouse/console.h +++ b/include/jailhouse/console.h @@ -49,6 +49,7 @@ #define JAILHOUSE_CON_TYPE_HSCIF 0x0006 #define JAILHOUSE_CON_TYPE_SCIFA 0x0007 #define JAILHOUSE_CON_TYPE_IMX 0x0008 +#define JAILHOUSE_CON_TYPE_IMX_LPUART 0x0009 /* Flags: bit 0 is used to select PIO (cleared) or MMIO (set) access */ #define JAILHOUSE_CON_ACCESS_PIO 0x0000 diff --git a/inmates/lib/arm-common/Makefile.lib b/inmates/lib/arm-common/Makefile.lib index 3d7b335d..c13696f3 100644 --- a/inmates/lib/arm-common/Makefile.lib +++ b/inmates/lib/arm-common/Makefile.lib @@ -40,7 +40,7 @@ objs-y := ../string.o ../cmdline.o ../setup.o ../alloc.o ../uart-8250.o objs-y += ../printk.o ../pci.o objs-y += printk.o gic.o mem.o pci.o timing.o setup.o uart.o objs-y += uart-xuartps.o uart-mvebu.o uart-hscif.o uart-scifa.o uart-imx.o -objs-y += uart-pl011.o +objs-y += uart-pl011.o uart-imx-lpuart.o objs-y += gic-v2.o gic-v3.o common-objs-y = $(addprefix ../arm-common/,$(objs-y)) diff --git a/inmates/lib/arm-common/uart-imx-lpuart.c b/inmates/lib/arm-common/uart-imx-lpuart.c new file mode 100644 index 00000000..bbbb53f2 --- /dev/null +++ b/inmates/lib/arm-common/uart-imx-lpuart.c @@ -0,0 +1,58 @@ +/* + * Copyright 2020 NXP + * + * Authors: + * Peng Fan <peng....@nxp.com> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + * Alternatively, you can use or redistribute this file under the following + * BSD license: + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <inmate.h> +#include <uart.h> + +#define UART_DATA 0x1c +#define UART_STAT 0x14 +#define STAT_TDRE (1 << 23) + +static void uart_imx_lpuart_init(struct uart_chip *chip) +{ +} + +static bool uart_imx_lpuart_is_busy(struct uart_chip *chip) +{ + return !(mmio_read32(chip->base + UART_STAT) & STAT_TDRE); +} + +static void uart_imx_lpuart_write(struct uart_chip *chip, char c) +{ + mmio_write32(chip->base + UART_DATA, c); +} + +DEFINE_UART(imx_lpuart, "IMX-LPUART", JAILHOUSE_CON_TYPE_IMX_LPUART); diff --git a/inmates/lib/arm-common/uart.c b/inmates/lib/arm-common/uart.c index 8855d476..90a322b5 100644 --- a/inmates/lib/arm-common/uart.c +++ b/inmates/lib/arm-common/uart.c @@ -42,6 +42,7 @@ DECLARE_UART(8250); DECLARE_UART(hscif); DECLARE_UART(imx); +DECLARE_UART(imx_lpuart); DECLARE_UART(mvebu); DECLARE_UART(pl011); DECLARE_UART(scifa); @@ -51,6 +52,7 @@ struct uart_chip *uart_array[] = { &UART_OPS_NAME(8250), &UART_OPS_NAME(hscif), &UART_OPS_NAME(imx), + &UART_OPS_NAME(imx_lpuart), &UART_OPS_NAME(mvebu), &UART_OPS_NAME(pl011), &UART_OPS_NAME(scifa), -- 2.17.1 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/20200519160017.19881-1-alice.guo%40nxp.com.