On 19.08.20 16:28, Alice Guo wrote:
> In gicv3_cpu_init(),32-bit guests use mmio_read32() to read 64-bit
> GICR_ TYPER in twice. Using mmio_read32() causes the execution of
> arch_handle_dabt(), which finally calls gicv3_handle_redist_access().
> Reading the higher 32 bits of GICR_TYPER uses
> mmio_read32(redist_addr + GICR_TYPER + 4), so add a processing case
> "GICR_TYPER + 4" in gicv3_handle_redist_access().
> 
> Signed-off-by: Alice Guo <alice....@nxp.com>
> ---
>  hypervisor/arch/arm-common/gic-v3.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/hypervisor/arch/arm-common/gic-v3.c 
> b/hypervisor/arch/arm-common/gic-v3.c
> index 6a1d90f8..584c2c79 100644
> --- a/hypervisor/arch/arm-common/gic-v3.c
> +++ b/hypervisor/arch/arm-common/gic-v3.c
> @@ -351,6 +351,9 @@ static enum mmio_result gicv3_handle_redist_access(void 
> *arg,
>               if (cpu_public->cpu_id == last_gicr)
>                               mmio->value |= GICR_TYPER_Last;
>               return MMIO_HANDLED;
> +     case GICR_TYPER + 4:
> +             mmio_perform_access(cpu_public->gicr.base, mmio);
> +             return MMIO_HANDLED;
>       case GICR_IIDR:
>       case 0xffd0 ... 0xfffc: /* ID registers */
>               /*
> 

Applied, but I replace subject and commit message as proposed.

Jan

-- 
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux

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