> > > - * Test configuration for Raspberry Pi 4 (32-bit, quad-core Cortex-A72, > 1GB RAM) > > + * Test configuration for Raspberry Pi 4 (32-bit, quad-core Cortex-A72, > 1GB, 2GB, 4GB or 8GB RAM) > > Not sure anymore what I meant with "32-bit", that can be removed. >
Alright, I was wondering what that means. > * > > * Copyright (c) Siemens AG, 2020 > > * > > @@ -10,6 +10,9 @@ > > * > > * This work is licensed under the terms of the GNU GPL, version 2. See > > * the COPYING file in the top-level directory. > > + * > > + * Reservation via device tree: reg = <0x0 0x20000000 0x10000000>; > > + * reg = <0x0 0xe0000000 0x200000>; > > Why this split-up into two regions? > > This will also mean I need to add a patch to [1] so that the DT will > carry the carve out. And drop the mem= from [2]. Or can we rearrange the > reservation to keep that mem= cut-off, at the price of wasting memory on > larger RPi variants? > It's because the PCI MMIO address space is mapped to 0xe0000000 in the original configuration. I don't know where this address comes from, but I've had some issues then I moved it somewhere else. I would like it most if it would be above all the available memory, but I was getting errors when i tried to do so: [ 154.161182] pci-host-generic 200000000.pci: host bridge /pci@0 ranges: [ 154.161231] pci-host-generic 200000000.pci: MEM 0x200100000..0x200103fff -> 0x200100000 [ 154.161354] pci-host-generic 200000000.pci: ECAM at [mem 0x200000000-0x2000fffff] for [bus 00] [ 154.161525] pci-host-generic 200000000.pci: PCI host bridge to bus 0001:00 [ 154.161540] pci_bus 0001:00: root bus resource [bus 00] [ 154.161553] pci_bus 0001:00: root bus resource [mem 0x200100000-0x200103fff] [ 154.161620] pci 0001:00:00.0: [110a:4106] type 00 class 0xff0000 [ 154.161718] pci 0001:00:00.0: reg 0x10: [mem 0x00000000-0x00000fff] [ 154.162420] pci 0001:00:01.0: [110a:4106] type 00 class 0xff0001 [ 154.162523] pci 0001:00:01.0: reg 0x10: [mem 0x00000000-0x00000fff] [ 154.166228] pci 0001:00:00.0: BAR 0: no space for [mem size 0x00001000] [ 154.166246] pci 0001:00:00.0: BAR 0: failed to assign [mem size 0x00001000] [ 154.166259] pci 0001:00:01.0: BAR 0: no space for [mem size 0x00001000] [ 154.166270] pci 0001:00:01.0: BAR 0: failed to assign [mem size 0x00001000] So it seems that only 32-bit addresses are supported. When I tried to move it somewhere to the reserved space (e.g. to 0x20000000), I was getting crashes when enabling Jailhouse. So I stuck to the original address. Currently, as it is, with the mem= limitation, it works also on the 2G and 4G variants. 8G doesn't even boot because the RPi firmware is too old (it boots with the next branch of jailhouse-images). But the purpose of this patch is to enable use of all the available memory (maybe I should specify that better?). For reserving the memory, I have a device tree overlay that can be used to do so. It has configurable offset and size, so it can be used multiple times from config.txt to reserve multiple memory regions. I tried to integrate that into jailhouse-images, but currently the precompiled DT overlays coming with RPi firmware are used, not the ones getting built with the kernel, so I would need to change that first. Jakub -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/CAGdCPwtX9JoP_RocDeB-MF3XTz%2ByyrXYL2LBCOs_-xa_TVA6Ug%40mail.gmail.com.
