Branch: refs/heads/next
Home: https://github.com/siemens/jailhouse
Commit: 8e1aea00f77d1c1a4b2313255966b741c2f1fd93
https://github.com/siemens/jailhouse/commit/8e1aea00f77d1c1a4b2313255966b741c2f1fd93
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2020-08-29 (Sat, 29 Aug 2020)
Changed paths:
M hypervisor/arch/arm-common/gic-v2.c
Log Message:
-----------
arm-common: gicv2: Fix byte access to ITARGETR
Byte-size write accesses overwrote all fields the issuing cell owned,
not only the target byte. And byte-size read accesses may have returned
the wrong value. This was broken since the beginning, just wasn't
stressed properly so far. Latest jailhouse-enabling/5.4-rpi revealed it
finally.
Fixes: ee6b35ba9037 ("arm: GICv2: handle SPI routing")
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
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