Add root cell and inmate cell configuration files for imx8qm. Signed-off-by: Alice Guo <alice....@nxp.com> --- configs/arm64/imx8qm-ivshmem-demo.c | 124 ++++++++++++++++ configs/arm64/imx8qm-linux-demo.c | 199 ++++++++++++++++++++++++++ configs/arm64/imx8qm.c | 213 ++++++++++++++++++++++++++++ 3 files changed, 536 insertions(+) create mode 100644 configs/arm64/imx8qm-ivshmem-demo.c create mode 100644 configs/arm64/imx8qm-linux-demo.c create mode 100644 configs/arm64/imx8qm.c
diff --git a/configs/arm64/imx8qm-ivshmem-demo.c b/configs/arm64/imx8qm-ivshmem-demo.c new file mode 100644 index 00000000..2bfe88d5 --- /dev/null +++ b/configs/arm64/imx8qm-ivshmem-demo.c @@ -0,0 +1,124 @@ +/* + * iMX8QM target - ivshmem-demo + * + * Copyright 2020 NXP + * + * Authors: + * Peng Fan <peng....@nxp.com> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +struct { + struct jailhouse_cell_desc cell; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[8]; + struct jailhouse_irqchip irqchips[1]; + struct jailhouse_pci_device pci_devices[1]; +} __attribute__((packed)) config = { + .cell = { + .signature = JAILHOUSE_CELL_DESC_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .name = "ivshmem-demo", + .flags = JAILHOUSE_CELL_PASSIVE_COMMREG, + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = ARRAY_SIZE(config.irqchips), + .num_pci_devices = ARRAY_SIZE(config.pci_devices), + .vpci_irq_base = 90, /* Not include 32 base */ + + .console = { + .address = 0x5a060000, + .type = JAILHOUSE_CON_TYPE_IMX_LPUART, + .flags = JAILHOUSE_CON_ACCESS_MMIO | + JAILHOUSE_CON_REGDIST_4, + }, + }, + + .cpus = { + 0x8, + }, + + .mem_regions = { + /* IVHSMEM shared memory region for 00:00.0 (demo )*/ { + .phys_start = 0xfd900000, + .virt_start = 0xfd900000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xfd901000, + .virt_start = 0xfd901000, + .size = 0x9000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xfd90a000, + .virt_start = 0xfd90a000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xfd90c000, + .virt_start = 0xfd90c000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xfd90e000, + .virt_start = 0xfd90e000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + /* UART1 */ { + .phys_start = 0x5a060000, + .virt_start = 0x5a060000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, + }, + /* RAM: from Inmate memory of imx8qm.c */ { + .phys_start = 0xdf700000, + .virt_start = 0, + .size = 0x00010000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, + }, + /* communication region */ { + .virt_start = 0x80000000, + .size = 0x00001000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_COMM_REGION, + }, + }, + + .irqchips = { + /* GIC */ { + .address = 0x51a00000, + .pin_base = 96, + .pin_bitmap = { + 0x1 << (90 + 32 - 96) /* irq 122 */ + }, + }, + }, + + .pci_devices = { + { /* IVSHMEM 00:00.0 (demo) */ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .domain = 0, + .bdf = 0 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 0, + .shmem_dev_id = 1, + .shmem_peers = 1, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, + }, + }, +}; diff --git a/configs/arm64/imx8qm-linux-demo.c b/configs/arm64/imx8qm-linux-demo.c new file mode 100644 index 00000000..f13ca7bc --- /dev/null +++ b/configs/arm64/imx8qm-linux-demo.c @@ -0,0 +1,199 @@ +/* + * iMX8QM target - linux-demo + * + * Copyright 2020 NXP + * + * Authors: + * Peng Fan <peng....@nxp.com> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +struct { + struct jailhouse_cell_desc cell; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[18]; + struct jailhouse_irqchip irqchips[4]; + struct jailhouse_pci_device pci_devices[2]; + __u32 stream_ids[1]; +} __attribute__((packed)) config = { + .cell = { + .signature = JAILHOUSE_CELL_DESC_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .name = "imx8qm-linux-demo", + .flags = JAILHOUSE_CELL_PASSIVE_COMMREG, + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_stream_ids = ARRAY_SIZE(config.stream_ids), + .num_irqchips = ARRAY_SIZE(config.irqchips), + .num_pci_devices = ARRAY_SIZE(config.pci_devices), + .vpci_irq_base = 124, /* Not include 32 base */ + }, + + .cpus = { + 0xc, + }, + + .mem_regions = { + /* IVHSMEM shared memory region for 00:00.0 (demo )*/ { + .phys_start = 0xfd900000, + .virt_start = 0xfd900000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xfd901000, + .virt_start = 0xfd901000, + .size = 0x9000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xfd90a000, + .virt_start = 0xfd90a000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xfd90c000, + .virt_start = 0xfd90c000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, + }, + { + .phys_start = 0xfd90e000, + .virt_start = 0xfd90e000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_ROOTSHARED, + }, + /* IVSHMEM shared memory regions for 00:01.0 (networking) */ + JAILHOUSE_SHMEM_NET_REGIONS(0xfda00000, 1), + /* UART0 earlycon */ { + .phys_start = 0x5a060000, + .virt_start = 0x5a060000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, + }, + /* UART2*/ { + .phys_start = 0x5a080000, + .virt_start = 0x5a080000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* UART2_LPCG*/ { + .phys_start = 0x5a480000, + .virt_start = 0x5a480000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* SHDC0 */ { + .phys_start = 0x5b010000, + .virt_start = 0x5b010000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* SHDC0_LPCG */ { + .phys_start = 0x5b200000, + .virt_start = 0x5b200000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* MU2 */ { + .phys_start = 0x5d1d0000, + .virt_start = 0x5d1d0000, + .size = 0x10000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + /* RAM: Top at 4GB Space */ { + .phys_start = 0xdf700000, + .virt_start = 0xdf700000, + .size = 0x1e000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA | + JAILHOUSE_MEM_LOADABLE, + }, + /* RAM: Bottom at 4GB Space */ { + .phys_start = 0xfdb00000, + .virt_start = 0, + .size = 0x10000, /* 64KB */ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, + }, + /* communication region */ { + .virt_start = 0x80000000, + .size = 0x00001000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_COMM_REGION, + }, + }, + + .irqchips = { + /* IVSHMEM */ { + .address = 0x51a00000, + .pin_base = 128, + .pin_bitmap = { + 0xf << (124 + 32 - 128) + }, + }, + /* MU2_A */ { + .address = 0x51a00000, + .pin_base = 192, + .pin_bitmap = { + (1 << (178 + 32 - 192)) + }, + }, + /* sdhc1 */ { + .address = 0x51a00000, + .pin_base = 256, + .pin_bitmap = { + (1 << (232 + 32 - 256)) + }, + }, + /* lpuart2 */ { + .address = 0x51a00000, + .pin_base = 352, + .pin_bitmap = { + (1 << (347 + 32 - 352)) + }, + }, + }, + + .pci_devices = { + { /* IVSHMEM 00:00.0 (demo) */ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .domain = 0, + .bdf = 0 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 0, + .shmem_dev_id = 2, + .shmem_peers = 3, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, + }, + { /* IVSHMEM 00:01.0 (networking) */ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .domain = 0, + .bdf = 1 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 5, + .shmem_dev_id = 1, + .shmem_peers = 2, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, + }, + }, + + .stream_ids = { + 0x10, + }, +}; diff --git a/configs/arm64/imx8qm.c b/configs/arm64/imx8qm.c new file mode 100644 index 00000000..20451cf5 --- /dev/null +++ b/configs/arm64/imx8qm.c @@ -0,0 +1,213 @@ +/* + * i.MX8QM Target + * + * Copyright 2020 NXP + * + * Authors: + * Peng Fan <peng....@nxp.com> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +struct { + struct jailhouse_system header; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[15]; + struct jailhouse_irqchip irqchips[3]; + struct jailhouse_pci_device pci_devices[2]; + __u32 stream_ids[3]; +} __attribute__((packed)) config = { + .header = { + .signature = JAILHOUSE_SYSTEM_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE, + .hypervisor_memory = { + .phys_start = 0xfdc00000, + .size = 0x00400000, + }, + .debug_console = { + .address = 0x5a060000, + .size = 0x1000, + .flags = JAILHOUSE_CON_TYPE_IMX_LPUART | + JAILHOUSE_CON_ACCESS_MMIO | + JAILHOUSE_CON_REGDIST_4, + .type = JAILHOUSE_CON_TYPE_IMX_LPUART, + }, + .platform_info = { + /* + * .pci_mmconfig_base is fixed; if you change it, + * update the value in mach.h + * (PCI_CFG_BASE) and regenerate the inmate library + */ + .pci_mmconfig_base = 0xfd700000, + .pci_mmconfig_end_bus = 0x0, + .pci_is_virtual = 1, + .pci_domain = 0, + + .iommu_units = { + { + .type = JAILHOUSE_IOMMU_ARM_MMU500, + .base = 0x51400000, + .size = 0x40000, + .arm_sid_mask = 0x7f80, + }, + }, + + .arm = { + .gic_version = 3, + .gicd_base = 0x51a00000, + .gicr_base = 0x51b00000, + .maintenance_irq = 25, + }, + }, + + .root_cell = { + .name = "imx8qm", + + .num_pci_devices = ARRAY_SIZE(config.pci_devices), + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_stream_ids = ARRAY_SIZE(config.stream_ids), + .num_irqchips = ARRAY_SIZE(config.irqchips), + /* + * vpci_irq_base not include base 32 + */ + .vpci_irq_base = 53, + }, + }, + + .cpus = { + 0x3f, + }, + + .mem_regions = { + /* IVHSMEM shared memory region for 00:00.0 (demo )*/ { + .phys_start = 0xfd900000, + .virt_start = 0xfd900000, + .size = 0x1000, + .flags = JAILHOUSE_MEM_READ, + }, + { + .phys_start = 0xfd901000, + .virt_start = 0xfd901000, + .size = 0x9000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE , + }, + { + .phys_start = 0xfd90a000, + .virt_start = 0xfd90a000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE , + }, + { + .phys_start = 0xfd90c000, + .virt_start = 0xfd90c000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ, + }, + { + .phys_start = 0xfd90e000, + .virt_start = 0xfd90e000, + .size = 0x2000, + .flags = JAILHOUSE_MEM_READ, + }, + /* IVSHMEM shared memory regions for 00:01.0 (networking) */ + JAILHOUSE_SHMEM_NET_REGIONS(0xfda00000, 0), + /* MMIO (permissive): TODO: refine the map */ { + .phys_start = 0x00000000, + .virt_start = 0x00000000, + .size = 0x80000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_IO, + }, + + /* RAM */ { + .phys_start = 0x80200000, + .virt_start = 0x80200000, + .size = 0x5f500000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE, + }, + /* Inmate memory */ { + .phys_start = 0xdf700000, + .virt_start = 0xdf700000, + .size = 0x1e000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* Loader */{ + .phys_start = 0xfdb00000, + .virt_start = 0xfdb00000, + .size = 0x100000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE, + }, + /* OP-TEE reserved memory */{ + .phys_start = 0xfe000000, + .virt_start = 0xfe000000, + .size = 0x2000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, + }, + /* RAM2 */ { + .phys_start = 0x880000000, + .virt_start = 0x880000000, + .size = 0x100000000, + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | + JAILHOUSE_MEM_EXECUTE, + }, + }, + + .irqchips = { + /* GIC */ { + .address = 0x51a00000, + .pin_base = 32, + .pin_bitmap = { + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + }, + }, + /* GIC */ { + .address = 0x51a00000, + .pin_base = 160, + .pin_bitmap = { + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + }, + }, + /* GIC */ { + .address = 0x51a00000, + .pin_base = 288, + .pin_bitmap = { + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + }, + }, + }, + + .pci_devices = { + { /* IVSHMEM 0000:00:00.0 (demo) */ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .domain = 0, + .bdf = 0 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 0, + .shmem_dev_id = 0, + .shmem_peers = 3, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, + }, + { /* IVSHMEM 0000:00:01.0 (networking) */ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, + .domain = 0, + .bdf = 1 << 3, + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, + .shmem_regions_start = 5, + .shmem_dev_id = 0, + .shmem_peers = 2, + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, + }, + }, + + .stream_ids = { + 0x11, 0x12, 0x13, + }, +}; -- 2.17.1 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. 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