On 12.02.21 10:05, Sainz Markel wrote: >> >> -----Mensaje original----- >> De: Jan Kiszka <jan.kis...@siemens.com> Enviado el: miƩrcoles, 10 de >> febrero de 2021 14:33 >> Para: Sainz Markel <msa...@ikerlan.es>; jailhouse-dev@googlegroups.com >> Asunto: Re: Overflow in MMIO registration >> >> CAUTION: This email originated from outside of the organization. Do not >> click links or open attachments unless you recognize the sender and know the >> content is safe. >> >> >> On 10.02.21 14:31, Jan Kiszka wrote: >>> On 10.02.21 12:15, Sainz Markel wrote: >>>> On 08.02.21 12:24, Kizska Jan wrote: >>>> >>>>> Something may have caused a subpage MMIO region to be created >>>>> (page-unaligned memory region). If that region split-up didn't exist in >>>>> the root cell already, things will fail. But I suspect that subpage is >>>>> rather a symptom, not the >cause. >>>> >>>>> Where there any compiler warnings when building the config? I would also >>>>> recommend checking our configs via "jailhouse config check root.cell >>>>> cell1.cell cell2.cell ...". Or share what you created. >>>> >>>>> Jan >>>> >>>>> -- >>>>> Siemens AG, T RDA IOT >>>>> Corporate Competence Center Embedded Linux >>>> >>>> There are no warning during compilation and jailhouse config check command >>>> says it is everything correct. >>>> >>>> #jailhouse config check sysconfig.cell core1-cell.cell core2-cell.cell >>>> core3-cell.cell core4-cell.cell core5-cell.cell >>>> Reading configuration set: >>>> Root cell: RootCell (sysconfig.cell) >>>> Non-root cell: core1-cell (core1-cell.cell) >>>> Non-root cell: core2-cell (core2-cell.cell) >>>> Non-root cell: core3-cell (core3-cell.cell) >>>> Non-root cell: core4-cell (core4-cell.cell) >>>> Non-root cell: core5-cell (core5-cell.cell) Overlapping memory >>>> regions inside cell: None Overlapping memory regions with hypervisor: >>>> None Missing PCI MMCONFIG interceptions: None Missing IOMMU >>>> interceptions: None Missing resource interceptions for architecture >>>> x86: None >>>> >>> >Attached to the mail the cell files I'm using. The .bin file is the same >>> >as for apic-demo. >>>> >>> >> >Just looking at core1-cell.c reveals that you are neither aligning on >> >physical page boundaries for the base nor using page-aligned sizes. >> >So it is like I predicted. And it is NOT a simple copy of apic-demo.c. >>> >> >>> ...and we should likely enhance jailhouse-config-check to catch also this >>> case. >> >>God, don't know what was thinking at... That's working now, cell starts >>correctly. I can't see any output in the console, what did you mean in a >>previous main with " Hope you do not let all cells use the same UART console >>in this duplication (PIO 0x3f8 etc.)." I'm now just creating a single cell >>and no output is being shown... >>
>I meant that you cannot hand out the single UART to multiple cells at the same >time. There is no virtualization of this resource. You can >use it, obviously, >to bring up one instance of a cell and then disable it for that cell again. >Connection to the cell should go via ivshmem: ivshmem-net or >virtio-over-ivshmem or something custom. After having modified the .c files to align sizes and boundaries, apparently cell starts with no issues. I understood what you said about using the same UART interface among all cell files and that it won't work. ATM I'm just starting a single cell and no console output is being displayed. What am I doing wrong? Attached the updates .c files. -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/AM0PR03MB4450BC428F28AF03F2616F33B6869%40AM0PR03MB4450.eurprd03.prod.outlook.com.
#include <jailhouse/types.h> #include <jailhouse/cell-config.h> struct { struct jailhouse_cell_desc cell; __u64 cpus[1]; struct jailhouse_memory mem_regions[2]; struct jailhouse_cache cache_regions[1]; struct jailhouse_pio pio_regions[3]; } __attribute__((packed)) config = { .cell = { .signature = JAILHOUSE_CELL_DESC_SIGNATURE, .revision = JAILHOUSE_CONFIG_REVISION, .name = "core1-cell", .flags = JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED, .cpu_set_size = sizeof(config.cpus), .num_memory_regions = ARRAY_SIZE(config.mem_regions), .num_cache_regions = ARRAY_SIZE(config.cache_regions), .num_irqchips = 0, .num_pio_regions = ARRAY_SIZE(config.pio_regions), .num_pci_devices = 0, .console = { .type = JAILHOUSE_CON_TYPE_8250, .flags = JAILHOUSE_CON_ACCESS_PIO, .address = 0x3f8, }, }, .cpus = { 0x2, }, .mem_regions = { /* RAM */ { .phys_start = 0x3f200000, .virt_start = 0, .size = 0x01000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, }, /* communication region */ { .virt_start = 0x01000000, .size = 0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_COMM_REGION, }, }, .cache_regions = { { .start = 0, .size = 2, .type = JAILHOUSE_CACHE_L3, }, }, .pio_regions = { PIO_RANGE(0x2f8, 8), /* serial 2 */ PIO_RANGE(0x3f8, 8), /* serial 1 */ PIO_RANGE(0xe010, 8), /* OXPCIe952 serial */ }, };
/* * Jailhouse, a Linux-based partitioning hypervisor * * Copyright (c) Siemens AG, 2013-2016 * * Authors: * Jan Kiszka <jan.kis...@siemens.com> * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. */ #include <inmate.h> #define MSR_SMI_COUNT 0x34 #define POLLUTE_CACHE_SIZE (512 * 1024) #define APIC_TIMER_VECTOR 32 /* * Enables blinking LED * SIMATIC IPC127E: register 0xd0c506a8, pin 0 */ static void *led_reg; static unsigned int led_pin; static unsigned long expected_time; static unsigned long min = -1, max; static bool has_smi_count; static u32 initial_smis; static const unsigned int smi_count_models[] = { 0x37, 0x4a, 0x4d, 0x5a, 0x5d, 0x5c, 0x7a, /* Silvermont */ 0x1a, 0x1e, 0x1f, 0x2e, /* Nehalem */ 0x2a, 0x2d, /* Sandy Bridge */ 0x57, 0x85, /* Xeon Phi */ 0 }; static bool cpu_has_smi_count(void) { unsigned int family, model, smi_count_model, n = 0; unsigned long eax; asm volatile("cpuid" : "=a" (eax) : "a" (1) : "rbx", "rcx", "rdx", "memory"); family = ((eax & 0xf00) >> 8) | ((eax & 0xff00000) >> 16); model = ((eax & 0xf0) >> 4) | ((eax & 0xf0000) >> 12); if (family == 0x6) { do { smi_count_model = smi_count_models[n++]; if (model == smi_count_model) return true; } while (smi_count_model != 0); } return false; } static void irq_handler(unsigned int irq) { unsigned long delta; u32 smis; if (irq != APIC_TIMER_VECTOR) return; delta = tsc_read_ns() - expected_time; if (delta < min) min = delta; if (delta > max) max = delta; printk("Timer fired, jitter: %6ld ns, min: %6ld ns, max: %6ld ns", delta, min, max); if (has_smi_count) { smis = (u32)read_msr(MSR_SMI_COUNT); if (smis != initial_smis) printk(", SMIs: %d", smis - initial_smis); } printk("\n"); if (led_reg) mmio_write32(led_reg, mmio_read32(led_reg) ^ (1 << led_pin)); expected_time += 100 * NS_PER_MSEC; apic_timer_set(expected_time - tsc_read_ns()); } static void init_apic(void) { unsigned long apic_freq_khz; irq_init(irq_handler); apic_freq_khz = apic_timer_init(APIC_TIMER_VECTOR); printk("Calibrated APIC frequency: %lu kHz\n", apic_freq_khz); expected_time = tsc_read_ns() + NS_PER_MSEC; apic_timer_set(NS_PER_MSEC); asm volatile("sti"); } static void pollute_cache(char *mem) { unsigned long cpu_cache_line_size, ebx; unsigned long n; asm volatile("cpuid" : "=b" (ebx) : "a" (1) : "rcx", "rdx", "memory"); cpu_cache_line_size = (ebx & 0xff00) >> 5; for (n = 0; n < POLLUTE_CACHE_SIZE; n += cpu_cache_line_size) mem[n] ^= 0xAA; } void inmate_main(void) { bool allow_terminate = false; bool terminate = false; unsigned long tsc_freq; bool cache_pollution; char *mem; comm_region->cell_state = JAILHOUSE_CELL_RUNNING_LOCKED; cache_pollution = cmdline_parse_bool("pollute-cache", false); if (cache_pollution) { mem = alloc(PAGE_SIZE, PAGE_SIZE); printk("Cache pollution enabled\n"); } has_smi_count = cpu_has_smi_count(); if (has_smi_count) { initial_smis = (u32)read_msr(MSR_SMI_COUNT); printk("Initial number of SMIs: %d\n", initial_smis); } tsc_freq = tsc_init(); printk("Calibrated TSC frequency: %lu.%03lu kHz\n", tsc_freq / 1000, tsc_freq % 1000); init_apic(); led_reg = (void *)(unsigned long)cmdline_parse_int("led-reg", 0); led_pin = cmdline_parse_int("led-pin", 0); if (led_reg) map_range(led_reg, 4, MAP_UNCACHED); while (!terminate) { cpu_relax(); if (cache_pollution) pollute_cache(mem); switch (comm_region->msg_to_cell) { case JAILHOUSE_MSG_SHUTDOWN_REQUEST: if (!allow_terminate) { printk("Rejecting first shutdown request - " "try again!\n"); jailhouse_send_reply_from_cell(comm_region, JAILHOUSE_MSG_REQUEST_DENIED); allow_terminate = true; } else terminate = true; break; case JAILHOUSE_MSG_NONE: break; default: jailhouse_send_reply_from_cell(comm_region, JAILHOUSE_MSG_UNKNOWN); break; } } printk("Stopped APIC demo\n"); comm_region->cell_state = JAILHOUSE_CELL_SHUT_DOWN; }