Dear Jailhouse community, dear Jan, I am considering using the performance monitor counters in Intel CPUs while using Jailhouse. Given that the counters are private to each logical core, this is a nice opportunity to get more insight in the performance of the application in the cell.
The current implementation disables the perf counters when initializing a cell, and exits on any writes to MSR_IA32_PERF_GLOBAL_CTRL to ignore the msr write. Why are these counters disabled? Is it just to omit complexity, or am I overlooking a structural reason why the use of these counters is unviable? I consulted the Intel SDM on perf counters, and could not find a reason not to whitelist the MSRs, so I wanted to check whether I am overlooking something. Thanks! Kind regards, Bram Hooimeijer -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/AS8PR02MB666308E65BE540CAEE21862CB6809%40AS8PR02MB6663.eurprd02.prod.outlook.com.
