Branch: refs/heads/coverity_scan
Home: https://github.com/siemens/jailhouse
Commit: 49b3b33c1338a59fd333c69fffbff813990f8042
https://github.com/siemens/jailhouse/commit/49b3b33c1338a59fd333c69fffbff813990f8042
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2021-03-08 (Mon, 08 Mar 2021)
Changed paths:
M hypervisor/arch/arm-common/gic-v2.c
Log Message:
-----------
arm-common: Reorder gicv2_cpu_init
This pulls CPU ID validation and gicv2_target_cpu_map setup to the
beginning of gicv2_cpu_init so that we can fail early if needed, before
any changes to the hardware configuration are made. This will also help
when introducing SDEI-based management interrupts.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
Commit: 68e592b1f315172b707e41ec3c6ac1ca86419771
https://github.com/siemens/jailhouse/commit/68e592b1f315172b707e41ec3c6ac1ca86419771
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2021-03-08 (Mon, 08 Mar 2021)
Changed paths:
M hypervisor/arch/arm-common/smccc.c
M hypervisor/arch/arm/include/asm/smc.h
M hypervisor/arch/arm64/include/asm/smc.h
Log Message:
-----------
arm/arm64: Expand return type of smc helpers to long
This allows to evaluate all 64 bits on arm64. Will be needed for SDEI.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
Commit: 839f3ab97da1aa1bb98bf8e0afcd66ae6d33ff17
https://github.com/siemens/jailhouse/commit/839f3ab97da1aa1bb98bf8e0afcd66ae6d33ff17
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2021-03-08 (Mon, 08 Mar 2021)
Changed paths:
M hypervisor/arch/arm/include/asm/smc.h
M hypervisor/arch/arm64/include/asm/smc.h
Log Message:
-----------
arm/arm64: Add further smc helpers
Will be used for SDEI. Actually not on ARM, but we add the smc_arg2 to
please the build and avoid surprises once it is used for real.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
Commit: 275e855a0b75c03c9162c6a3bb4fe7414bf7e37e
https://github.com/siemens/jailhouse/commit/275e855a0b75c03c9162c6a3bb4fe7414bf7e37e
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2021-03-08 (Mon, 08 Mar 2021)
Changed paths:
M hypervisor/arch/arm64/setup.c
Log Message:
-----------
arm64: Reorder arch_cpu_init
This will allow to modify the hcr value based on the result of
arm_cpu_init when SDEI is in play.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
Commit: 467e6524fd2f2f58ea11fa7966695cc9d4048bec
https://github.com/siemens/jailhouse/commit/467e6524fd2f2f58ea11fa7966695cc9d4048bec
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2021-03-08 (Mon, 08 Mar 2021)
Changed paths:
M hypervisor/arch/arm-common/control.c
M hypervisor/arch/arm-common/include/asm/smccc.h
M hypervisor/arch/arm-common/irqchip.c
M hypervisor/arch/arm-common/smccc.c
Log Message:
-----------
arm-common: Add SDEI-based management event injection support
This is the first building block for switching to management interrupts
using the Software Delegated Exception Interface (SDEI) which will allow
to pass the GICC to the guest.
In this step, the feature flag is introduced - but not yet set -, and
arch_send_event is augmented with sending the event via
SDEI_EVENT_SIGNAL, software event 0.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
Commit: 4d41e47391385220c796aba6728382a5a37485f0
https://github.com/siemens/jailhouse/commit/4d41e47391385220c796aba6728382a5a37485f0
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2021-03-08 (Mon, 08 Mar 2021)
Changed paths:
M hypervisor/arch/arm-common/gic-v2.c
M hypervisor/arch/arm-common/gic-v3.c
M hypervisor/arch/arm-common/irqchip.c
Log Message:
-----------
arm-common: Pass through GIC CPU interface in SDEI mode
When SDEI is used for management interrupts, we can give the gicc
completely to the cell. This requires to skip gic-v2 and gic-v3 per-cpu
initializations and to map the physical gicc-v2 into the cell or to not
enable ICH_HCR_EN in case of gic-v3. Furthermore, injected interrupts
now have to be sent as physical SGI to the target, rather than being
queued for the virtual interface.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
Commit: 482b64b129b5506065095d4e76165bd53ee87d9e
https://github.com/siemens/jailhouse/commit/482b64b129b5506065095d4e76165bd53ee87d9e
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2021-03-08 (Mon, 08 Mar 2021)
Changed paths:
M hypervisor/arch/arm-common/include/asm/smccc.h
M hypervisor/arch/arm64/asm-defines.c
M hypervisor/arch/arm64/entry.S
M hypervisor/arch/arm64/include/asm/entry.h
M hypervisor/arch/arm64/include/asm/percpu_fields.h
M hypervisor/arch/arm64/setup.c
M hypervisor/arch/arm64/traps.c
Log Message:
-----------
arm64: Add SDEI-based management interrupt handling
This brings the arm64-specific bits to handle management interrupts sent
via SDEI.
The pattern for processing them is derived from NMI-based injection on
x86: The SDEI event can come asynchronously at any time while in EL2,
EL1 or EL0. To avoid having to synchronize with running EL2, translate
it into a trap that is triggered on EL1/0 reentry. We use an invalid
VTCR_EL2 value for this and set the per-cpu sdei_event flag. When EL2
finds this flag set on handling the trap, it kicks off SGI_EVENT
handling and restores VTCR_EL2.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
Commit: 31b3017324624b02a6731d9a5c6194208e7b3e3e
https://github.com/siemens/jailhouse/commit/31b3017324624b02a6731d9a5c6194208e7b3e3e
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2021-03-08 (Mon, 08 Mar 2021)
Changed paths:
M hypervisor/arch/arm64/setup.c
Log Message:
-----------
arm64: Do not trap interrupts when using SDEI
They can (and must) be delivered directly to the cell in that mode. GIC
CPU interfaces are already passed through.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
Commit: 03d07e0f703987b8437969caadc30916aa0f9cbe
https://github.com/siemens/jailhouse/commit/03d07e0f703987b8437969caadc30916aa0f9cbe
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2021-03-08 (Mon, 08 Mar 2021)
Changed paths:
M hypervisor/arch/arm-common/psci.c
Log Message:
-----------
arm-common: Improve PSCI documentation
Describe what happens around CPU_SUSPEND and use the official symbolic
return code. Also explain what is (not) returned from CPU_OFF.
No functional changes.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
Commit: f97e8528200c5800a0a2e24494b2451592e1453f
https://github.com/siemens/jailhouse/commit/f97e8528200c5800a0a2e24494b2451592e1453f
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2021-03-08 (Mon, 08 Mar 2021)
Changed paths:
M hypervisor/arch/arm-common/include/asm/control.h
M hypervisor/arch/arm-common/psci.c
M hypervisor/arch/arm/control.c
M hypervisor/arch/arm64/control.c
Log Message:
-----------
arm-common: Handle SDEI case in PSCI CPU_SUSPEND
When suspending the CPU while interrupts are passed through, we cannot
simply call wfi as EL2 is not receiving interrupts as wakeup events -
the CPU would starve.
Factor out arm_cpu_passthru_suspend to handle this case by enabling IMO
and FMO before calling wfi. That ensures that EL2 will resume, and as
interrupts are off in that mode, the events will simply be carried to
EL1 when clearing IMO/FMO before returning.
For ARM, arm_cpu_passthru_suspend remains empty as there is no SDEI.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
Commit: ee0e5c42c9baf1389481c372693cd8fab0e1cb88
https://github.com/siemens/jailhouse/commit/ee0e5c42c9baf1389481c372693cd8fab0e1cb88
Author: Jan Kiszka <jan.kis...@siemens.com>
Date: 2021-03-08 (Mon, 08 Mar 2021)
Changed paths:
M hypervisor/arch/arm-common/include/asm/smccc.h
M hypervisor/arch/arm-common/setup.c
M hypervisor/arch/arm-common/smccc.c
Log Message:
-----------
arm-common: Detect availability of SDEI on arm64
Enhance smccc_discover() to detect if SDEI is available on all CPUs on
arm64. Fail on inconsistent availability, now returning and error code.
SDEI is practically only available on arm64 and also only implemented
there in Jailhouse. So skip the probing on 32-bit.
This activates the previously introduced SDEI paths.
Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
Compare:
https://github.com/siemens/jailhouse/compare/6c09785cb079...ee0e5c42c9ba
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