> Subject: Re: [PATCH 2/5] Check UART UCR1_UARTEN bit before writing data
> 
> On 23.03.21 07:25, peng....@nxp.com wrote:
> > From: Peng Fan <peng....@nxp.com>
> >
> > There is frequent start/shutdown operation in kernel reboot process.
> > And at the end of kernel reboot, kernel will switch to use console
> > output,saying imx_console_write on i.MX8MM.
> >
> > imx_console_write will save/restore uart configuration.
> > However before imx_console_write the UCR1_UARTEN already set to 0.
> > when restore, it is also 0. Then when we runs into jailhouse disable,
> > jailhouse write to uart will trigger errors.
> 
> What kind of errors? Hardware exceptions or what?

Hardware exceptions.

> 
> >
> > So let's add a check.
> >
> > However to hypervisor itself, there is still risk that kernel disable
> > uart, whenh jailhouse is going to write data registers even with this
> > patch applied.
> >
> > There is no good way to avoid such contention, the best way to avoid
> > such issue is that use a different uart from Linux or remove `.type =
> > JAILHOUSE_CON_TYPE_IMX,` from configs/arm64/imx8mm.c.
> >
> > Remove `.type = JAILHOUSE_CON_TYPE_IMX,` means jailhouse hypervisor
> > will not output to uart, but you still could see jailhouse log by `cat
> > /dev/jailhouse`
> 
> There is no separate UART available, to have kernel and Jailhouse on different
> channels?

It depends on board design.

> 
> Another alternative is to avoid using the UART as console under Linux, right?

Yes. But in case jailhouse is sharing the uart with Linux.

Thanks,
Peng.

> 
> >
> > Signed-off-by: Peng Fan <peng....@nxp.com>
> > ---
> >  hypervisor/arch/arm-common/uart-imx.c | 4 ++++
> >  inmates/lib/arm-common/uart-imx.c     | 4 ++++
> >  2 files changed, 8 insertions(+)
> >
> > diff --git a/hypervisor/arch/arm-common/uart-imx.c
> > b/hypervisor/arch/arm-common/uart-imx.c
> > index 849f8fca..6485f36e 100644
> > --- a/hypervisor/arch/arm-common/uart-imx.c
> > +++ b/hypervisor/arch/arm-common/uart-imx.c
> > @@ -15,6 +15,8 @@
> >
> >  #define UTS                        0xb4
> >  #define UTXD                       0x40
> > +#define UCR1                       0x80
> > +#define UCR1_UARTEN                (1<<0)
> >  #define UTS_TXEMPTY                (1 << 6)
> >
> >  static void uart_init(struct uart_chip *chip) @@ -29,6 +31,8 @@
> > static bool uart_is_busy(struct uart_chip *chip)
> >
> >  static void uart_write_char(struct uart_chip *chip, char c)  {
> > +   if ((mmio_read32(chip->virt_base + UCR1) & UCR1_UARTEN) !=
> > +UCR1_UARTEN)
> 
> if (mmio_read32(chip->virt_base + UCR1) & UCR1_UARTEN)
>       mmio_write32(chip->virt_base + UTXD, c);
> 
> And a comment on the "why" here would be good.
> 
> > +           return;
> >     mmio_write32(chip->virt_base + UTXD, c);  }
> >
> > diff --git a/inmates/lib/arm-common/uart-imx.c
> > b/inmates/lib/arm-common/uart-imx.c
> > index 984dc218..9cdf9089 100644
> > --- a/inmates/lib/arm-common/uart-imx.c
> > +++ b/inmates/lib/arm-common/uart-imx.c
> > @@ -39,6 +39,8 @@
> >
> >  #define UTS                        0xb4
> >  #define UTXD                       0x40
> > +#define UCR1                       0x80
> > +#define UCR1_UARTEN                (1<<0)
> >  #define UTS_TXEMPTY                (1 << 6)
> >
> >  static void uart_imx_init(struct uart_chip *chip) @@ -53,6 +55,8 @@
> > static bool uart_imx_is_busy(struct uart_chip *chip)
> >
> >  static void uart_imx_write(struct uart_chip *chip, char c)  {
> > +   if ((mmio_read32(chip->base + UCR1) & UCR1_UARTEN) !=
> UCR1_UARTEN)
> > +           return;
> >     mmio_write32(chip->base + UTXD, c);
> >  }
> >
> >
> 
> Jan
> 
> --
> Siemens AG, T RDA IOT
> Corporate Competence Center Embedded Linux

-- 
You received this message because you are subscribed to the Google Groups 
"Jailhouse" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to jailhouse-dev+unsubscr...@googlegroups.com.
To view this discussion on the web visit 
https://groups.google.com/d/msgid/jailhouse-dev/DB6PR0402MB27606C1FA79A5B33C6E6052388649%40DB6PR0402MB2760.eurprd04.prod.outlook.com.

Reply via email to