From: Stefan Huber <stefan.hu...@oth-regensburg.de>
With this, introduce the APLIC irqchip type in cell-config.h.
Signed-off-by: Ralf Ramsauer <ralf.ramsa...@oth-regensburg.de>
---
configs/riscv/dts/qemu-linux-inmate-aplic.dts | 111 ++++++++++++++++++
configs/riscv/qemu-aplic-mc.c | 3 +
configs/riscv/qemu-aplic-uc.c | 3 +
configs/riscv/qemu-linux-demo-aplic.c | 2 +
configs/riscv/qemu-linux-demo.h | 4 +-
configs/riscv/qemu-plic-mc.c | 1 +
configs/riscv/qemu-plic-uc.c | 1 +
configs/riscv/qemu.h | 17 ++-
include/jailhouse/cell-config.h | 1 +
9 files changed, 140 insertions(+), 3 deletions(-)
create mode 100644 configs/riscv/dts/qemu-linux-inmate-aplic.dts
create mode 100644 configs/riscv/qemu-aplic-mc.c
create mode 100644 configs/riscv/qemu-aplic-uc.c
create mode 100644 configs/riscv/qemu-linux-demo-aplic.c
diff --git a/configs/riscv/dts/qemu-linux-inmate-aplic.dts
b/configs/riscv/dts/qemu-linux-inmate-aplic.dts
new file mode 100644
index 00000000..49eb3993
--- /dev/null
+++ b/configs/riscv/dts/qemu-linux-inmate-aplic.dts
@@ -0,0 +1,111 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) OTH Regensburg, 2022
+ *
+ * Authors:
+ * Ralf Ramsauer <ralf.ramsa...@oth-regensburg.de>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+/dts-v1/;
+/ {
+ model = "Jailhouse cell on RISC-V";
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ chosen {
+ stdout-path = "/soc/uart@10000000:115200n8";
+ bootargs = "console=ttyS0 earlycon=sbi";
+ linux,initrd-start = <0x82000000>;
+ linux,initrd-end = <0x83000000>;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ /* 63MiB @ 0x80000000 */
+ reg = <0x00000000 0x80000000>, <0x00000000 0x8000000>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ timebase-frequency = <0x989680>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ reg = <0>;
+ status = "okay";
+ compatible = "riscv";
+ riscv,isa =
"rv64imafdc_zicsr_zifencei_zihintpause_zawrs_zba_zbb_zbc_zbs_sstc";
+ mmu-type = "riscv,sv39";
+
+ cpu0_intc: interrupt-controller {
+ #interrupt-cells = <1>;
+ compatible = "riscv,cpu-intc";
+ interrupt-controller;
+ };
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ reg = <1>;
+ status = "okay";
+ compatible = "riscv";
+ riscv,isa =
"rv64imafdc_zicsr_zifencei_zihintpause_zawrs_zba_zbb_zbc_zbs_sstc";
+ mmu-type = "riscv,sv39";
+
+ cpu1_intc: interrupt-controller {
+ #interrupt-cells = <1>;
+ compatible = "riscv,cpu-intc";
+ interrupt-controller;
+ };
+ };
+ };
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "simple-bus";
+ ranges;
+
+ uart@10000000 {
+ interrupts = <10 4>;
+ interrupt-parent = <&aplic0>;
+ clock-frequency = "\08@";
+ reg = <0x00 0x10000000 0x00 0x100>;
+ compatible = "ns16550a";
+ status = "okay";
+ };
+
+ /* S-Mode APLIC */
+ aplic0: aplic@d000000 {
+ riscv,num-sources = <0x60>;
+ reg = <0x00 0xd000000 0x00 0x8000>;
+ interrupts-extended = <&cpu0_intc 0x09>,
+ <&cpu1_intc 0x09>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ compatible = "riscv,aplic";
+ };
+
+ pci@30000000 {
+ compatible = "pci-host-ecam-generic";
+ device_type = "pci";
+ bus-range = <0 0>;
+ #interrupt-cells = <1>;
+ reg = <0x0 0x30000000 0x0 0x10000000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <
+ 0x1000000 0x00 0x00 0x00 0x3000000 0x00 0x10000
+ 0x2000000 0x00 0x40000000 0x00 0x40000000 0x00
0x40000000
+ 0x3000000 0x04 0x00 0x04 0x00 0x04 0x00>;
+
+ interrupt-map-mask = <0>;
+ interrupt-map = <0 0 0 1 &aplic0 32 4>;
+ };
+ };
+};
diff --git a/configs/riscv/qemu-aplic-mc.c b/configs/riscv/qemu-aplic-mc.c
new file mode 100644
index 00000000..34c3bc9d
--- /dev/null
+++ b/configs/riscv/qemu-aplic-mc.c
@@ -0,0 +1,3 @@
+#define QEMU_MC
+#define QEMU_APLIC
+#include "qemu.h"
diff --git a/configs/riscv/qemu-aplic-uc.c b/configs/riscv/qemu-aplic-uc.c
new file mode 100644
index 00000000..a26dcaa0
--- /dev/null
+++ b/configs/riscv/qemu-aplic-uc.c
@@ -0,0 +1,3 @@
+#define QEMU_UC
+#define QEMU_APLIC
+#include "qemu.h"
diff --git a/configs/riscv/qemu-linux-demo-aplic.c
b/configs/riscv/qemu-linux-demo-aplic.c
new file mode 100644
index 00000000..81442a13
--- /dev/null
+++ b/configs/riscv/qemu-linux-demo-aplic.c
@@ -0,0 +1,2 @@
+#define QEMU_APLIC
+#include "qemu-linux-demo.h"
diff --git a/configs/riscv/qemu-linux-demo.h b/configs/riscv/qemu-linux-demo.h
index d86fdae0..68575dc6 100644
--- a/configs/riscv/qemu-linux-demo.h
+++ b/configs/riscv/qemu-linux-demo.h
@@ -90,9 +90,11 @@ struct {
},
.irqchips = {
- /* PLIC */ {
+ /* (A)PLIC */ {
#ifdef QEMU_PLIC
.address = 0xc000000,
+#elif defined(QEMU_APLIC)
+ .address = 0xd000000,
#endif
.pin_base = 0,
.pin_bitmap = {
diff --git a/configs/riscv/qemu-plic-mc.c b/configs/riscv/qemu-plic-mc.c
index c70371d2..c29be90a 100644
--- a/configs/riscv/qemu-plic-mc.c
+++ b/configs/riscv/qemu-plic-mc.c
@@ -1,2 +1,3 @@
#define QEMU_MC
+#define QEMU_PLIC
#include "qemu.h"
diff --git a/configs/riscv/qemu-plic-uc.c b/configs/riscv/qemu-plic-uc.c
index 1439aa95..f9842775 100644
--- a/configs/riscv/qemu-plic-uc.c
+++ b/configs/riscv/qemu-plic-uc.c
@@ -1,2 +1,3 @@
#define QEMU_UC
+#define QEMU_PLIC
#include "qemu.h"
diff --git a/configs/riscv/qemu.h b/configs/riscv/qemu.h
index 940efb3f..ceae015f 100644
--- a/configs/riscv/qemu.h
+++ b/configs/riscv/qemu.h
@@ -53,6 +53,7 @@ struct {
.pci_mmconfig_end_bus = 0xff, // ??
.riscv = {
.irqchip = {
+#ifdef QEMU_PLIC
.type = JAILHOUSE_RISCV_PLIC,
.base_address = 0xc000000,
.size = 0x600000,
@@ -66,7 +67,14 @@ struct {
[4] = 9,
[5] = 11,
[6 ... 31] = -1,
- }
+ },
+#elif defined(QEMU_APLIC)
+ .type = JAILHOUSE_RISCV_APLIC,
+ .base_address = 0xd000000,
+ .size = 0x8000,
+ .max_irq = 96,
+ .max_priority = 7,
+#endif
},
},
},
@@ -171,9 +179,14 @@ struct {
},
},
.irqchips = {
+#ifdef QEMU_PLIC
/* plic@c000000 */ {
.address = 0xc000000,
- .id = 0 /* PLIC */,
+#elif defined(QEMU_APLIC)
+ /* aplic_s@d000000 */ {
+ .address = 0xd000000,
+#endif
+ .id = 0,
.pin_base = 0,
.pin_bitmap = {
(1 << 0xa), /* uart@10000000 */
diff --git a/include/jailhouse/cell-config.h b/include/jailhouse/cell-config.h
index 787d6a26..cb9d3b53 100644
--- a/include/jailhouse/cell-config.h
+++ b/include/jailhouse/cell-config.h
@@ -333,6 +333,7 @@ struct jailhouse_pio {
!!((flags) & JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE)
#define JAILHOUSE_RISCV_PLIC 0
+#define JAILHOUSE_RISCV_APLIC 1
/**
* General descriptor of the system.
--
2.40.1
--
You received this message because you are subscribed to the Google Groups
"Jailhouse" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to jailhouse-dev+unsubscr...@googlegroups.com.
To view this discussion on the web visit
https://groups.google.com/d/msgid/jailhouse-dev/20230519204033.643200-63-ralf.ramsauer%40oth-regensburg.de.
