To reply with an other question: how much value would it add for the
users when we release fast? I did not follow the lists too close
lately, but im impression is that the beta is pretty good. If this is
not the case, then we should focus on fixing the problems.
If the beta is okay, we could either leave it at that or release soon
to get rid of the 'beta' label.

As for conditional compiling, I like to revisit the 'hardware version'
discussion.
I think it is a bad idea to do conditional compiling of code on the
device type but need to determine hardware versions of each peripheral
and base the code on this. This hardware version can be defined in the
device files or we can check on the device types in a specific lib.

To get an idea about the different hardware versions, I played around
with the 'adcon' registers of all pics.
It turns out that most of the 18f pics don't have such a register, and
the 10/16 pics have  11 different combinations (where * = adcon):

*0_ADCS+*0_CHS+*0_GO+*0_NDONE+*0_ADON+*1_ADFM+*1_ADCS2+*1_PCFG+
#16f819#16f870#16f874#16f876#16f877#16f88
*0_ADCS+*0_CHS+*0_GO+*0_NDONE+*0_ADON+*1_ADFM+*1_ADCS2+*1_VCFG+  #16f882
*0_ADCS+*0_CHS+*0_GO+*0_NDONE+*0_ADON+*1_ADFM+*1_PCFG+
#16f871#16f872#16f873#16f873a#16f874a#16f876a#16f877a
*0_ADCS+*0_CHS+*0_GO+*0_NDONE+*0_ADON+*1_ADFM+*1_VCFG1+*1_VCFG0+
#16f883#16f884#16f886#16f887#16f913
*0_ADCS+*0_CHS+*0_GO+*0_NDONE+*0_ADON+*1_PCFG+
#16f72#16f722#16f737#16f747#16f767#16f777
*0_ADCS+*0_CHS+*0_GO+*0_NDONE+*0_CHS3+*0_ADON+*2_ACQT+*1_ADFM+*1_ADCS2+*1_VCFG+*1_PCFG+
 #16f74#16f76#16f77#16f785
*0_ADFM+*0_VCFG+*0_CHS+*0_GO+*0_NDONE+*0_ADON+  #12f675#12f683#12hv615#16f506
*0_ADFM+*0_VCFG+*0_CHS+*0_GO+*0_NDONE+*0_ADON+*1_ADCS+
#16f676#16f677#16f684#16f685#16f687#16f688#16f689#16f690#16f716#16f818#16f914#16f916#16f917#16f946#16hv616#16hv785#16lf722
*0_ANS+*0_ADCS+*0_CHS+*0_GO+*0_NDONE+*0_ADON+  #12f615#16f526#16f616
*0_ANS+*0_CHS+*0_GO+*0_NDONE+*0_ADON+  #10f222#12f510
*0_CHS+*0_GO+*0_NDONE+*0_ADON+*1_ADCS+*1_ADREF+
#16f723#16f724#16f726#16f727#16f73#16lf723#16lf724#16lf726#16lf727#18f1220

Besides this 11 versions, we have different domains of this registers
- like 16f877 and 16f876 who have the same registers but resp. 8 and 5
ad channels.

It all looks like a lot of work to support all those versions. But the
least we should do, is handle these versions or users will get lost.
What I suggest:
- use different hardware versions in the library code.
- assign the hardware versions in the lib itself, based on the type.
- divide support in two classes: full and beta, where 'full' means we
have actually tested this lib on that chip (or one in the same
datasheet). Beta means it compiles and could work, but we have not
verified it (like 16f882 which is close to 16f877).
Beta code can be enabled by an flag; default, compile will fail on a
pragma error.

Joep





2008/11/30 Sebastien LELONG <[EMAIL PROTECTED]>:
>
> Hi guys,
>
> I've just tried the last jalv2 compiler version, 2.4i still in beta. I tried
> conditional compiling, and it seems to work !!! I was thinking about
> modifying pwm libs, like I wanted them to be at the very first start (see
> http://code.google.com/p/jallib/issues/detail?id=9&can=1&q=pwm&colspec=ID%20Type%20Status%20Priority%20Component%20Milestone%20Owner%20Summary#c3
> and next comment).
>
> Question is: do you want to:
>
>  1.  release soon, no modification in libs about conditional compiling (I'm
> thinking about pwm libs, but there may be others)
>  2. release later, which gives time to play with this nice new feature
>
> We may also wait for official jalv2 2.4i release, and wait if this version is
> stable enough (I have no idea, from what Rob says, I understand this is quite
> a nice version...)
>
>
> Cheers,
> Seb
> --
> Sébastien LELONG
> http://www.sirloon.net
> http://sirbot.org
>
> >
>

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