Revision: 1308 Author: [email protected] Date: Mon Sep 7 12:55:41 2009 Log: generate eeprom test from board files http://code.google.com/p/jallib/source/detail?r=1308
Added: /trunk/sample/16f877a_data_eeprom.jal /trunk/sample/18f14k50_data_eeprom.jal /trunk/sample/18f4550_data_eeprom.jal /trunk/test/peripheral/data_eeprom/test_data_eeprom.jal Modified: /trunk/sample/16f648a_data_eeprom.jal /trunk/sample/16f88_data_eeprom.jal /trunk/sample/18f4550_seven_segment.jal ======================================= --- /dev/null +++ /trunk/sample/16f877a_data_eeprom.jal Mon Sep 7 12:55:41 2009 @@ -0,0 +1,62 @@ +-- ------------------------------------------------------ +-- Title: Sample data EEPROM write and read for the Microchip PIC16F88 +-- +-- Author: Rob Hamerling, Copyright (c) 2008..2008, all rights reserved. +-- +-- Adapted-by: Albert Faber +-- +-- Compiler: =2.4 +-- +-- This file is part of jallib (http://jallib.googlecode.com) +-- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) +-- +-- Description: +-- Sample data EEPROM write and read for the Microchip PIC16F88 +-- +-- Sources: +-- +-- Notes: Includes blink-an-LED +-- +-- ------------------------------------------------------ +-- +-- This file has been generated from: +-- * board: board_16f877a_dwarf.jal +-- * test : test_data_eeprom.jal +-- + +;@jallib section chipdef +-- chip setup +include 16f877a + +pragma target clock 20_000_000 -- xtal frequency +pragma target OSC hs +pragma target LVP disabled +pragma target WDT disabled + + +enable_digital_io() -- disable analog modules + +include pic_data_eeprom +;@jallib section led +-- LED IO definition +alias led is pin_b6 +alias led_direction is pin_b6_direction +alias led2 is pin_a1 +alias led2_direction is pin_a1_direction +led_direction = output + +var byte i = 0 -- counter + +forever loop + + led = on + _usec_delay(250000) -- wait a little + led = off + _usec_delay(250000) + + data_eeprom_write(i,i) -- write counter + i = data_eeprom(i) -- read back + i = i + 1 + +end loop + ======================================= --- /dev/null +++ /trunk/sample/18f14k50_data_eeprom.jal Mon Sep 7 12:55:41 2009 @@ -0,0 +1,101 @@ +-- ------------------------------------------------------ +-- Title: Sample data EEPROM write and read for the Microchip PIC16F88 +-- +-- Author: Rob Hamerling, Copyright (c) 2008..2008, all rights reserved. +-- +-- Adapted-by: Albert Faber +-- +-- Compiler: =2.4 +-- +-- This file is part of jallib (http://jallib.googlecode.com) +-- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) +-- +-- Description: +-- Sample data EEPROM write and read for the Microchip PIC16F88 +-- +-- Sources: +-- +-- Notes: Includes blink-an-LED +-- +-- ------------------------------------------------------ +-- +-- This file has been generated from: +-- * board: board_18f14k50_af.jal +-- * test : test_data_eeprom.jal +-- + +;@jallib section chipdef +-- chip setup +include 18f14k50 + +-- This file is the setup for my homebrew, 18f14k50 board +-- Currently it is a bare board, with just a PIC and a couple of headers +-- A 12 MHz external crystal and 15pf caps connected to OSC1/2 +-- pin 17 (Vusb) with a 220 nF capacitor to the ground +-- The connection between PC and the 18F14k50 +-- +5v to power the board (don't forget 100nf decoupling cap +-- data- wire to pin 18 (D-) +-- data+ wire to pin 19 (D+) +-- ground wire to the Vss of the PIC +-- even though the external crystal is 12 MHz, the configuration is such that +-- the CPU clock is derived from the 96 Mhz PLL clock (div2), therefore set +-- target frequency to 48 MHz +pragma target clock 48_000_000 + + +-- fuses +pragma target CPUDIV NO_CPU_SYSTEM_CLOCK_DIVIDE +pragma target USBDIV USB_CLOCK_COMES_DIRECTLY_FROM_THE_OSC1_OSC2_OSCILLATOR_BLOCK__NO_DIVIDE +pragma target OSC HS +pragma target PLLEN OSCILLATOR_MULTIPLIED_BY_4 +pragma target FCMEN DISABLED +pragma target IESO DISABLED +pragma target PWRTE DISABLED -- power up timer +pragma target BROWNOUT DISABLED -- no brownout detection +pragma target VOLTAGE V30 -- brown out voltage +pragma target WDT DISABLED -- no watchdog +pragma target WDTPS P32768 -- watch dog saler setting +pragma target MCLR INTERNAL -- no master reset +pragma target LVP DISABLED -- no low-voltage programming +pragma target XINST ENABLED -- extended instruction set +pragma target BACKBUG DISABLED -- background debugging +pragma target CP_0 DISABLED -- code block 0 not protected +pragma target CP_1 DISABLED -- code block 1 not protected +pragma target CPB DISABLED -- bootblock code not write protected +pragma target WRT_0 DISABLED -- table writeblock 0 not protected +pragma target WRT_1 DISABLED -- table write block 1 not protected +pragma target WRTB DISABLED -- bootblock not write protected +pragma target WRTC DISABLED -- config not write protected +pragma target EBTR_0 DISABLED -- table read block 0 not protected +pragma target EBTR_1 DISABLED -- table read block 1 not protected +pragma target EBTRB DISABLED -- boot block not protected +pragma target HFOFST THE_SYSTEM_CLOCK_IS_HELD_OFF_UNTIL_THE_HFINTOSC_IS_STABLE + + + +enable_digital_io() -- disable analog modules + +include pic_data_eeprom +;@jallib section led +-- LED IO definition +alias led is pin_c4 +alias led_direction is pin_c4_direction +alias led2 is pin_c6 +alias led2_direction is pin_c6_direction +led_direction = output + +var byte i = 0 -- counter + +forever loop + + led = on + _usec_delay(250000) -- wait a little + led = off + _usec_delay(250000) + + data_eeprom_write(i,i) -- write counter + i = data_eeprom(i) -- read back + i = i + 1 + +end loop + ======================================= --- /dev/null +++ /trunk/sample/18f4550_data_eeprom.jal Mon Sep 7 12:55:41 2009 @@ -0,0 +1,104 @@ +-- ------------------------------------------------------ +-- Title: Sample data EEPROM write and read for the Microchip PIC16F88 +-- +-- Author: Rob Hamerling, Copyright (c) 2008..2008, all rights reserved. +-- +-- Adapted-by: Albert Faber +-- +-- Compiler: =2.4 +-- +-- This file is part of jallib (http://jallib.googlecode.com) +-- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) +-- +-- Description: +-- Sample data EEPROM write and read for the Microchip PIC16F88 +-- +-- Sources: +-- +-- Notes: Includes blink-an-LED +-- +-- ------------------------------------------------------ +-- +-- This file has been generated from: +-- * board: board_18f4550_af.jal +-- * test : test_data_eeprom.jal +-- + +;@jallib section chipdef +-- chip setup +include 18f4550 + +-- even though the external crystal is 20 MHz, the configuration is such that +-- the CPU clock is derived from the 96 Mhz PLL clock (div2), therefore set +-- target frequency to 48 MHz +pragma target clock 48_000_000 + + +-- fuses +pragma target PLLDIV DIVIDE_BY_5__20MHZ_INPUT_ +pragma target CPUDIV _OSC1_OSC2_SRC___1__96MHZ_PLL_SRC___2_ +pragma target USBPLL CLOCK_SRC_FROM_96MHZ_PLL_2 +pragma target OSC HS_PLL +pragma target FCMEN DISABLED +pragma target IESO DISABLED +pragma target PWRTE DISABLED -- power up timer +pragma target VREGEN ENABLED -- USB voltage regulator +pragma target VOLTAGE V20 -- brown out voltage +pragma target BROWNOUT DISABLED -- no brownout detection +pragma target WDTPS P32768 -- watch dog saler setting +pragma target WDT DISABLED -- no watchdog +pragma target CCP2MUX RC1 -- CCP2 pin +pragma target PBADEN DIGITAL -- digital input port<0..4> +pragma target LPT1OSC DISABLED -- low power timer 1 +pragma target MCLR EXTERNAL -- master reset on RE3 +pragma target STVR DISABLED -- reset on stack over/under flow +pragma target LVP DISABLED -- no low-voltage programming +pragma target XINST ENABLED -- extended instruction set +pragma target BACKBUG DISABLED -- background debugging +pragma target CP_0 DISABLED -- code block 0 not protected +pragma target CP_1 DISABLED -- code block 1 not protected +pragma target CP_2 DISABLED -- code block 2 not protected +pragma target CP_3 DISABLED -- code block 3 not protected +pragma target CPB DISABLED -- bootblock code not write protected +pragma target CPD DISABLED -- eeprom code not write protected +pragma target WRT_0 DISABLED -- table writeblock 0 not protected +pragma target WRT_1 DISABLED -- table write block 1 not protected +pragma target WRT_2 DISABLED -- table write block 2 not protected +pragma target WRT_3 DISABLED -- table write block 3 not protected +pragma target WRTB DISABLED -- bootblock not write protected +pragma target WRTD DISABLED -- eeprom not write protected +pragma target WRTC DISABLED -- config not write protected +pragma target EBTR_0 DISABLED -- table read block 0 not protected +pragma target EBTR_1 DISABLED -- table read block 1 not protected +pragma target EBTR_2 DISABLED -- table read block 2 not protected +pragma target EBTR_3 DISABLED -- table read block 3 not protected +pragma target EBTRB DISABLED -- boot block not protected + + + +enable_digital_io() -- disable analog modules + +include pic_data_eeprom +;@jallib section led +-- LED IO definition +alias led is pin_b3 +alias led_direction is pin_b3_direction +alias led2 is pin_b1 +alias led2_direction is pin_b1_direction +led_direction = output + +var byte i = 0 -- counter + +forever loop + + led = on + _usec_delay(250000) -- wait a little + led = off + _usec_delay(250000) + + data_eeprom_write(i,i) -- write counter + i = data_eeprom(i) -- read back + i = i + 1 + +end loop + ======================================= --- /dev/null +++ /trunk/test/peripheral/data_eeprom/test_data_eeprom.jal Mon Sep 7 12:55:41 2009 @@ -0,0 +1,47 @@ +-- ------------------------------------------------------ +-- Title: Sample data EEPROM write and read for the Microchip PIC16F88 +-- +-- Author: Rob Hamerling, Copyright (c) 2008..2008, all rights reserved. +-- +-- Adapted-by: Albert Faber +-- +-- Compiler: =2.4 +-- +-- This file is part of jallib (http://jallib.googlecode.com) +-- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) +-- +-- Description: +-- Sample data EEPROM write and read for the Microchip PIC16F88 +-- +-- Sources: +-- +-- Notes: Includes blink-an-LED +-- +-- ------------------------------------------------------ + +;@jallib use chipdef + + +enable_digital_io() -- disable analog modules + +include pic_data_eeprom + +;@jallib use led +led_direction = output + +var byte i = 0 -- counter + +forever loop + + led = on + _usec_delay(250000) -- wait a little + led = off + _usec_delay(250000) + + data_eeprom_write(i,i) -- write counter + i = data_eeprom(i) -- read back + i = i + 1 + +end loop + + ======================================= --- /trunk/sample/16f648a_data_eeprom.jal Mon Aug 17 12:03:37 2009 +++ /trunk/sample/16f648a_data_eeprom.jal Mon Sep 7 12:55:41 2009 @@ -1,5 +1,5 @@ -- ------------------------------------------------------ --- Title: Sample data EEPROM write and read for the Microchip PIC16F648a +-- Title: Sample data EEPROM write and read for the Microchip PIC16F88 -- -- Author: Rob Hamerling, Copyright (c) 2008..2008, all rights reserved. -- @@ -11,27 +11,43 @@ -- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) -- -- Description: --- Sample data EEPROM write and read for the Microchip PIC16F648a +-- Sample data EEPROM write and read for the Microchip PIC16F88 -- -- Sources: -- -- Notes: Includes blink-an-LED -- -- ------------------------------------------------------ - +-- +-- This file has been generated from: +-- * board: board_16f648a_js.jal +-- * test : test_data_eeprom.jal +-- + +;@jallib section chipdef +-- chip setup include 16f648a -pragma target OSC hs -pragma target clock 20_000_000 -pragma target WDT disabled -pragma target MCLR external +-- +-- This program assumes a 20 MHz resonator or crystal +-- is connected to pins OSC1 and OSC2. +pragma target OSC HS -- HS crystal or resonator +pragma target clock 20_000_000 -- oscillator frequency +pragma target WDT disabled +pragma target LVP disabled + + enable_digital_io() -- disable analog modules include pic_data_eeprom - -alias led is pin_A0 -pin_A0_direction = output +;@jallib section led +-- LED IO definition +alias led is pin_b3 +alias led_direction is pin_b3_direction +alias led2 is pin_b1 +alias led2_direction is pin_b1_direction +led_direction = output var byte i = 0 -- counter @@ -48,4 +64,3 @@ end loop - ======================================= --- /trunk/sample/16f88_data_eeprom.jal Tue Aug 18 22:29:12 2009 +++ /trunk/sample/16f88_data_eeprom.jal Mon Sep 7 12:55:41 2009 @@ -3,7 +3,7 @@ -- -- Author: Rob Hamerling, Copyright (c) 2008..2008, all rights reserved. -- --- Adapted-by: +-- Adapted-by: Albert Faber -- -- Compiler: =2.4 -- @@ -18,20 +18,46 @@ -- Notes: Includes blink-an-LED -- -- ------------------------------------------------------ - +-- +-- This file has been generated from: +-- * board: board_16f88_js.jal +-- * test : test_data_eeprom.jal +-- + +;@jallib section chipdef +-- chip setup include 16f88 -pragma target OSC hs -pragma target clock 20_000_000 -pragma target WDT disabled -pragma target MCLR external +;-- +;-- This setup assumes a 20 MHz resonator or crystal +;-- is connected to pins OSC1 and OSC2. +pragma target OSC HS -- HS crystal or resonator +pragma target clock 20_000_000 -- oscillator frequency +pragma target WDT disabled -- no watchdog +pragma target LVP disabled -- no low-voltage programming +pragma target CCP1MUX RB3 -- ccp1 pin on B3 + +-- +-- This setup uses the internal oscillator +;pragma target OSC INTOSC_NOCLKOUT -- HS crystal or resonator +;pragma target clock 8_000_000 -- oscillator frequency +;pragma target WDT disabled -- no watchdog +;pragma target LVP disabled -- no low-voltage programming +;pragma target CCP1MUX RB3 -- ccp1 pin on B3 +;OSCCON_IRCF = 7 -- set prescaler to 1 (8 MHz) + + enable_digital_io() -- disable analog modules include pic_data_eeprom - -alias led is pin_A0 -pin_A0_direction = output +;@jallib section led +-- LED IO definition +alias led is pin_b3 +alias led_direction is pin_b3_direction +alias led2 is pin_b1 +alias led2_direction is pin_b1_direction +led_direction = output var byte i = 0 -- counter @@ -48,4 +74,3 @@ end loop - ======================================= --- /trunk/sample/18f4550_seven_segment.jal Tue Aug 18 06:11:06 2009 +++ /trunk/sample/18f4550_seven_segment.jal Mon Sep 7 12:55:41 2009 @@ -24,7 +24,7 @@ -- -- This file has been generated from: -- * board: board_18f4550_af.jal --- * test : test_jseven.jal +-- * test : test_seven_segment.jal -- ;@jallib section chipdef --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "jallib" group. To post to this group, send email to [email protected] To unsubscribe from this group, send email to [email protected] For more options, visit this group at http://groups.google.com/group/jallib?hl=en -~----------~----~----~----~------~----~------~--~---
