It is necessary for System.out.println
Signed-off-by: Arthur HUILLET <arthur.huil...@free.fr>
---
arch/x86/emit-code.c | 7 +++++++
arch/x86/include/arch/instruction.h | 1 +
arch/x86/insn-selector_32.brg | 15 +++++++++++++++
arch/x86/lir-printer.c | 7 +++++++
arch/x86/use-def.c | 1 +
5 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/arch/x86/emit-code.c b/arch/x86/emit-code.c
index d66d9f0..3033adb 100644
--- a/arch/x86/emit-code.c
+++ b/arch/x86/emit-code.c
@@ -759,6 +759,12 @@ static void emit_add_membase_reg(struct buffer *buf,
emit_membase_reg(buf, 0x03, src, dest);
}
+static void emit_and_reg_reg(struct buffer *buf,
+ struct operand *src, struct operand *dest)
+{
+ emit_reg_reg(buf, 0x23, dest, src);
+}
+
static void emit_and_membase_reg(struct buffer *buf,
struct operand *src, struct operand *dest)
{
@@ -1003,6 +1009,7 @@ struct emitter emitters[] = {
DECL_EMITTER(INSN_ADD_MEMBASE_REG, emit_add_membase_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_ADD_REG_REG, emit_add_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_AND_MEMBASE_REG, emit_and_membase_reg, TWO_OPERANDS),
+ DECL_EMITTER(INSN_AND_REG_REG, emit_and_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_CALL_REG, emit_indirect_call, SINGLE_OPERAND),
DECL_EMITTER(INSN_CLTD_REG_REG, emit_cltd_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_CMP_IMM_REG, emit_cmp_imm_reg, TWO_OPERANDS),
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index 5e38144..8355a63 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -61,6 +61,7 @@ enum insn_type {
INSN_ADD_MEMBASE_REG,
INSN_ADD_REG_REG,
INSN_AND_MEMBASE_REG,
+ INSN_AND_REG_REG,
INSN_CALL_REG,
INSN_CALL_REL,
INSN_CLTD_REG_REG, /* CDQ in Intel manuals*/
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index fce1f50..bbe0f9e 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -432,6 +432,21 @@ reg: OP_AND(reg, EXPR_LOCAL) 1
}
}
+reg: OP_AND(reg, reg) 1
+{
+ struct expression *expr;
+
+ expr = to_expr(tree);
+
+ state->reg1 = state->left->reg1;
+ binop_reg_reg_low(state, s, tree, INSN_AND_REG_REG);
+
+ if (expr->vm_type == J_LONG) {
+ state->reg2 = state->left->reg2;
+ binop_reg_reg_high(state, s, tree, INSN_AND_REG_REG);
+ }
+}
+
reg: OP_XOR(reg, EXPR_LOCAL) 1
{
struct expression *expr;
diff --git a/arch/x86/lir-printer.c b/arch/x86/lir-printer.c
index 195f80e..31c89f6 100644
--- a/arch/x86/lir-printer.c
+++ b/arch/x86/lir-printer.c
@@ -196,6 +196,12 @@ static int print_and_membase_reg(struct string *str,
struct insn *insn)
return print_membase_reg(str, insn);
}
+static int print_and_reg_reg(struct string *str, struct insn *insn)
+{
+ print_func_name(str);
+ return print_reg_reg(str, insn);
+}
+
static int print_call_reg(struct string *str, struct insn *insn)
{
print_func_name(str);
@@ -501,6 +507,7 @@ static print_insn_fn insn_printers[] = {
[INSN_ADD_MEMBASE_REG] = print_add_membase_reg,
[INSN_ADD_REG_REG] = print_add_reg_reg,
[INSN_AND_MEMBASE_REG] = print_and_membase_reg,
+ [INSN_AND_REG_REG] = print_and_reg_reg,
[INSN_CALL_REG] = print_call_reg,
[INSN_CALL_REL] = print_call_rel,
[INSN_CLTD_REG_REG] = print_cltd_reg_reg, /* CDQ in Intel
manuals*/
diff --git a/arch/x86/use-def.c b/arch/x86/use-def.c
index 95342ad..38a4ef4 100644
--- a/arch/x86/use-def.c
+++ b/arch/x86/use-def.c
@@ -37,6 +37,7 @@ static struct insn_info insn_infos[] = {
DECLARE_INFO(INSN_ADD_MEMBASE_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_ADD_REG_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_AND_MEMBASE_REG, USE_SRC | DEF_DST),
+ DECLARE_INFO(INSN_AND_REG_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_CALL_REG, USE_SRC | DEF_EAX | DEF_ECX | DEF_EDX),
DECLARE_INFO(INSN_CALL_REL, USE_NONE | DEF_EAX | DEF_ECX | DEF_EDX),
DECLARE_INFO(INSN_CLTD_REG_REG, USE_SRC | DEF_SRC | DEF_DST),
--
1.6.2.2
------------------------------------------------------------------------------
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