Signed-off-by: Arthur HUILLET <arthur.huil...@free.fr>
---
Hi,
this is the updated, working version.
Please merge.
Sorry for screwing up.
arch/x86/emit-code.c | 8 ++++++++
arch/x86/include/arch/instruction.h | 1 +
arch/x86/insn-selector_32.brg | 5 +++++
arch/x86/lir-printer.c | 8 ++++++++
arch/x86/use-def.c | 1 +
regression/jvm/ConversionTest.java | 15 +++++++++++++++
test/arch-x86/emit-code-test_32.c | 5 +++++
7 files changed, 43 insertions(+), 0 deletions(-)
diff --git a/arch/x86/emit-code.c b/arch/x86/emit-code.c
index 3033adb..5798867 100644
--- a/arch/x86/emit-code.c
+++ b/arch/x86/emit-code.c
@@ -508,6 +508,13 @@ static void emit_mov_reg_reg(struct buffer *buf, struct
operand *src,
__emit_mov_reg_reg(buf, mach_reg(&src->reg), mach_reg(&dest->reg));
}
+static void emit_movsx_reg_reg(struct buffer *buf, struct operand *src,
+ struct operand *dest)
+{
+ emit(buf, 0x0f);
+ __emit_reg_reg(buf, 0xbe, mach_reg(&dest->reg), mach_reg(&src->reg));
+}
+
static void
emit_mov_memlocal_reg(struct buffer *buf, struct operand *src, struct operand
*dest)
{
@@ -1027,6 +1034,7 @@ struct emitter emitters[] = {
DECL_EMITTER(INSN_MOV_REG_MEMINDEX, emit_mov_reg_memindex,
TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_REG_MEMLOCAL, emit_mov_reg_memlocal,
TWO_OPERANDS),
DECL_EMITTER(INSN_MOV_REG_REG, emit_mov_reg_reg, TWO_OPERANDS),
+ DECL_EMITTER(INSN_MOVSX_REG_REG, emit_movsx_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_MUL_MEMBASE_EAX, emit_mul_membase_eax, TWO_OPERANDS),
DECL_EMITTER(INSN_MUL_REG_EAX, emit_mul_reg_eax, TWO_OPERANDS),
DECL_EMITTER(INSN_MUL_REG_REG, emit_mul_reg_reg, TWO_OPERANDS),
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index 8355a63..9dd5e3c 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -87,6 +87,7 @@ enum insn_type {
INSN_MOV_REG_MEMINDEX,
INSN_MOV_REG_MEMLOCAL,
INSN_MOV_REG_REG,
+ INSN_MOVSX_REG_REG,
INSN_MUL_MEMBASE_EAX,
INSN_MUL_REG_EAX,
INSN_MUL_REG_REG,
diff --git a/arch/x86/insn-selector_32.brg b/arch/x86/insn-selector_32.brg
index bbe0f9e..96316b7 100644
--- a/arch/x86/insn-selector_32.brg
+++ b/arch/x86/insn-selector_32.brg
@@ -930,7 +930,12 @@ reg: EXPR_CONVERSION(reg)
select_insn(s, tree, imm_reg_insn(INSN_SAR_IMM_REG, 0x1f,
state->reg2));
} else if (src->vm_type == J_LONG && expr->vm_type == J_INT) {
state->reg1 = state->left->reg1;
+ } else if (src->vm_type == J_INT && expr->vm_type == J_BYTE) {
+ state->reg1 = get_var(s->b_parent);
+
+ select_insn(s, tree, reg_reg_insn(INSN_MOVSX_REG_REG,
state->left->reg1, state->reg1));
} else {
+ printf("%d to %d\n", src->vm_type, expr->vm_type);
assert(!"conversion not implemented");
}
}
diff --git a/arch/x86/lir-printer.c b/arch/x86/lir-printer.c
index 31c89f6..8b4bc7f 100644
--- a/arch/x86/lir-printer.c
+++ b/arch/x86/lir-printer.c
@@ -354,6 +354,13 @@ static int print_mov_reg_reg(struct string *str, struct
insn *insn)
return print_reg_reg(str, insn);
}
+static int print_movsx_reg_reg(struct string *str, struct insn *insn)
+{
+ print_func_name(str);
+ print_reg_reg(str, insn);
+ return str_append(str, "(8bit->32bit)");
+}
+
static int print_mul_membase_eax(struct string *str, struct insn *insn)
{
print_func_name(str);
@@ -533,6 +540,7 @@ static print_insn_fn insn_printers[] = {
[INSN_MOV_REG_MEMINDEX] = print_mov_reg_memindex,
[INSN_MOV_REG_MEMLOCAL] = print_mov_reg_memlocal,
[INSN_MOV_REG_REG] = print_mov_reg_reg,
+ [INSN_MOVSX_REG_REG] = print_movsx_reg_reg,
[INSN_MUL_MEMBASE_EAX] = print_mul_membase_eax,
[INSN_MUL_REG_EAX] = print_mul_reg_eax,
[INSN_MUL_REG_REG] = print_mul_reg_reg,
diff --git a/arch/x86/use-def.c b/arch/x86/use-def.c
index 38a4ef4..12e4720 100644
--- a/arch/x86/use-def.c
+++ b/arch/x86/use-def.c
@@ -61,6 +61,7 @@ static struct insn_info insn_infos[] = {
DECLARE_INFO(INSN_MOV_REG_MEMINDEX, USE_SRC | USE_DST | USE_IDX_DST |
DEF_NONE),
DECLARE_INFO(INSN_MOV_REG_MEMLOCAL, USE_SRC),
DECLARE_INFO(INSN_MOV_REG_REG, USE_SRC | DEF_DST),
+ DECLARE_INFO(INSN_MOVSX_REG_REG, USE_SRC | DEF_DST),
DECLARE_INFO(INSN_MUL_MEMBASE_EAX, USE_SRC | DEF_DST | DEF_EDX |
DEF_EAX),
DECLARE_INFO(INSN_MUL_REG_EAX, USE_SRC | DEF_DST | DEF_EDX | DEF_EAX),
DECLARE_INFO(INSN_MUL_REG_REG, USE_SRC | DEF_DST),
diff --git a/regression/jvm/ConversionTest.java
b/regression/jvm/ConversionTest.java
index ee75b5c..ac5ccc2 100644
--- a/regression/jvm/ConversionTest.java
+++ b/regression/jvm/ConversionTest.java
@@ -51,9 +51,24 @@ public class ConversionTest extends TestCase {
assertEquals(-1L, i2l(c));
}
+ public static byte i2b(int value) {
+ return (byte) value;
+ }
+
+ public static void testIntegerToByteConversion() {
+ int b = 10;
+ int c = -1;
+ int a = b + 0x10000;
+
+ assertEquals(10, i2b(a));
+ assertEquals(10, i2b(b));
+ assertEquals(-1, i2b(c));
+ }
+
public static void main(String[] args) {
testLongToIntegerConversion();
testIntegerToLongConversion();
+ testIntegerToByteConversion();
exit();
}
diff --git a/test/arch-x86/emit-code-test_32.c
b/test/arch-x86/emit-code-test_32.c
index 1162786..35b9441 100644
--- a/test/arch-x86/emit-code-test_32.c
+++ b/test/arch-x86/emit-code-test_32.c
@@ -288,6 +288,11 @@ void test_emit_mov_reg_reg(void)
assert_emit_insn_2(0x89, 0xd9, reg_reg_insn(INSN_MOV_REG_REG, &VAR_EBX,
&VAR_ECX));
}
+void test_emit_movsx_reg_reg(void)
+{
+ assert_emit_insn_3(0x0f, 0xbe, 0xc2, reg_reg_insn(INSN_MOVSX_REG_REG,
&VAR_EDX, &VAR_EAX));
+ assert_emit_insn_3(0x0f, 0xbe, 0xcb, reg_reg_insn(INSN_MOVSX_REG_REG,
&VAR_EBX, &VAR_ECX));
+}
void test_emit_adc_disp_reg(void)
{
assert_emit_insn_3(0x13, 0x45, 0x04,
membase_reg_insn(INSN_ADC_MEMBASE_REG, &VAR_EBP, 0x04, &VAR_EAX));
--
1.6.2.2
------------------------------------------------------------------------------
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