Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
---
arch/x86/include/arch/registers.h | 14 +++++++++++++-
arch/x86/include/arch/registers_32.h | 3 +++
arch/x86/include/arch/registers_64.h | 12 ++++++++++++
arch/x86/use-def.c | 27 +++++++++++++++++++++++++--
jit/compilation-unit.c | 6 +++++-
jit/compiler.c | 2 ++
6 files changed, 60 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/arch/registers.h
b/arch/x86/include/arch/registers.h
index d00b0fd..9398dd7 100644
--- a/arch/x86/include/arch/registers.h
+++ b/arch/x86/include/arch/registers.h
@@ -1,5 +1,17 @@
+#ifndef __JATO_ARCH_REGISTERS
+#define __JATO_ARCH_REGISTERS
+
+#include <stdbool.h>
+
#ifdef CONFIG_X86_32
# include "registers_32.h"
#else
# include "registers_64.h"
-#endif
+#endif /* CONFIG_X86_32 */
+
+static inline bool is_fpu_register(enum machine_reg reg)
+{
+ return reg > MACH_REG_XMM0 && reg < NR_REGISTERS;
+}
+
+#endif /* __JATO_ARCH_REGISTERS */
diff --git a/arch/x86/include/arch/registers_32.h
b/arch/x86/include/arch/registers_32.h
index 05df975..30e852a 100644
--- a/arch/x86/include/arch/registers_32.h
+++ b/arch/x86/include/arch/registers_32.h
@@ -14,6 +14,8 @@ enum machine_reg {
MACH_REG_ESI,
MACH_REG_EDI,
+ /* All registers from this up to NR_REGISTERS must be FPU
+ registers. It's needed for is_fpu_register(). */
MACH_REG_XMM0,
MACH_REG_XMM1,
MACH_REG_XMM2,
@@ -46,6 +48,7 @@ enum machine_reg {
};
#define GPR_VM_TYPE J_INT
+#define FPU_VM_TYPE J_DOUBLE
const char *reg_name(enum machine_reg reg);
enum machine_reg_type reg_type(enum machine_reg reg);
diff --git a/arch/x86/include/arch/registers_64.h
b/arch/x86/include/arch/registers_64.h
index d3330e3..6fdf23b 100644
--- a/arch/x86/include/arch/registers_64.h
+++ b/arch/x86/include/arch/registers_64.h
@@ -20,6 +20,17 @@ enum machine_reg {
MACH_REG_R14,
MACH_REG_R15,
+ /* All registers from this up to NR_REGISTERS must be FPU
+ registers. It's needed for is_fpu_register(). */
+ MACH_REG_XMM0,
+ MACH_REG_XMM1,
+ MACH_REG_XMM2,
+ MACH_REG_XMM3,
+ MACH_REG_XMM4,
+ MACH_REG_XMM5,
+ MACH_REG_XMM6,
+ MACH_REG_XMM7,
+
/* The above registers are available for register allocator. */
NR_REGISTERS,
@@ -43,6 +54,7 @@ enum machine_reg {
};
#define GPR_VM_TYPE J_LONG
+#define FPU_VM_TYPE J_DOUBLE
const char *reg_name(enum machine_reg reg);
enum machine_reg_type reg_type(enum machine_reg reg);
diff --git a/arch/x86/use-def.c b/arch/x86/use-def.c
index 68cc940..b4c515c 100644
--- a/arch/x86/use-def.c
+++ b/arch/x86/use-def.c
@@ -23,14 +23,29 @@ enum {
USE_SRC = 1024,
USE_FP = 2048, /* frame pointer */
+ DEF_XMM0 = 1ul << 12,
+ DEF_XMM1 = 1ul << 13,
+ DEF_XMM2 = 1ul << 14,
+ DEF_XMM3 = 1ul << 15,
+ DEF_XMM4 = 1ul << 16,
+ DEF_XMM5 = 1ul << 17,
+ DEF_XMM6 = 1ul << 18,
+ DEF_XMM7 = 1ul << 19,
+
#ifdef CONFIG_X86_32
DEF_EAX = DEF_xAX,
DEF_ECX = DEF_xCX,
DEF_EDX = DEF_xDX,
+ DEF_XMM0_XMM7 = DEF_XMM0 | DEF_XMM1 | DEF_XMM2 | DEF_XMM3 |
+ DEF_XMM4 | DEF_XMM5 | DEF_XMM6 | DEF_XMM7,
+ DEF_CALLER_SAVED= DEF_xAX | DEF_xCX | DEF_xDX | DEF_XMM0_XMM7,
#else
DEF_RAX = DEF_xAX,
DEF_RCX = DEF_xCX,
DEF_RDX = DEF_xDX,
+
+ /* XXX: This is not correct ABI */
+ DEF_CALLER_SAVED= DEF_xAX | DEF_xCX | DEF_xDX,
#endif
};
@@ -49,8 +64,8 @@ static struct insn_info insn_infos[] = {
DECLARE_INFO(INSN_ADD_REG_REG, USE_SRC | USE_DST | DEF_DST),
DECLARE_INFO(INSN_AND_MEMBASE_REG, USE_SRC | USE_DST | DEF_DST),
DECLARE_INFO(INSN_AND_REG_REG, USE_SRC | USE_DST | DEF_DST),
- DECLARE_INFO(INSN_CALL_REG, USE_SRC | DEF_xAX | DEF_xCX | DEF_xDX),
- DECLARE_INFO(INSN_CALL_REL, USE_NONE | DEF_xAX | DEF_xCX | DEF_xDX),
+ DECLARE_INFO(INSN_CALL_REG, USE_SRC | DEF_CALLER_SAVED),
+ DECLARE_INFO(INSN_CALL_REL, USE_NONE | DEF_CALLER_SAVED),
DECLARE_INFO(INSN_CLTD_REG_REG, USE_SRC | DEF_SRC | DEF_DST),
DECLARE_INFO(INSN_CMP_IMM_REG, USE_DST),
DECLARE_INFO(INSN_CMP_MEMBASE_REG, USE_SRC | USE_DST),
@@ -155,6 +170,14 @@ static struct mach_reg_def checkregs[] = {
{ MACH_REG_xAX, DEF_xAX },
{ MACH_REG_xCX, DEF_xCX },
{ MACH_REG_xDX, DEF_xDX },
+ { MACH_REG_XMM0, DEF_XMM0 },
+ { MACH_REG_XMM1, DEF_XMM1 },
+ { MACH_REG_XMM2, DEF_XMM2 },
+ { MACH_REG_XMM3, DEF_XMM3 },
+ { MACH_REG_XMM4, DEF_XMM4 },
+ { MACH_REG_XMM5, DEF_XMM5 },
+ { MACH_REG_XMM6, DEF_XMM6 },
+ { MACH_REG_XMM7, DEF_XMM7 },
};
diff --git a/jit/compilation-unit.c b/jit/compilation-unit.c
index 9a207ac..6eefddd 100644
--- a/jit/compilation-unit.c
+++ b/jit/compilation-unit.c
@@ -101,7 +101,11 @@ struct compilation_unit *compilation_unit_alloc(struct
vm_method *method)
for (unsigned int i = 0; i < NR_FIXED_REGISTERS; ++i) {
struct var_info *ret;
- ret = do_get_var(cu, GPR_VM_TYPE, REG_TYPE_GPR);
+ if (is_fpu_register(i))
+ ret = do_get_var(cu, FPU_VM_TYPE, REG_TYPE_FPU);
+ else
+ ret = do_get_var(cu, GPR_VM_TYPE, REG_TYPE_GPR);
+
if (ret) {
ret->interval->reg = i;
ret->interval->fixed_reg = true;
diff --git a/jit/compiler.c b/jit/compiler.c
index 2f94e2f..b44db4a 100644
--- a/jit/compiler.c
+++ b/jit/compiler.c
@@ -92,6 +92,8 @@ int compile(struct compilation_unit *cu)
if (opt_trace_liveness)
trace_liveness(cu);
+ trace_flush();
+
err = allocate_registers(cu);
if (err)
goto out;
--
1.6.0.6
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