Branch: refs/heads/master
Home: http://github.com/penberg/jato
Commit: 9ffc88a87992000b530a19cf1fa6392e91ac778f
http://github.com/penberg/jato/commit/9ffc88a87992000b530a19cf1fa6392e91ac778f
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M jit/trace-jit.c
Log Message:
-----------
jit: add missing trace_flush() to trace_return_value()
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: 518ff910bbf9a64441a6ed575c1bf717e70d8e70
http://github.com/penberg/jato/commit/518ff910bbf9a64441a6ed575c1bf717e70d8e70
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M include/jit/compilation-unit.h
M include/jit/vars.h
M jit/compilation-unit.c
M jit/liveness.c
M jit/spill-reload.c
M jit/trace-jit.c
M test/jit/compilation-unit-test.c
M test/jit/liveness-test.c
Log Message:
-----------
jit: assign two LIR positions for each instruction.
We will need this to optimize register allocation. Every LIR instruction has
two positions assigned - consecutive even and odd. Even interval use positions
correspond to instruction input and odd positions correspond to instruction
output. Distinction between those allow to allocate the same physical register
to adjacent intervals where first ends at instruction input and the second
starts at instruction output. There are some more advantages of this described
in "Linear Scan Register Allocation for the Java HotSpot Client Compiler", C.
Wimmer.
This is a preliminary patch. All use positions are even yet.
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: 4373533bcfc158846e6768871043a4353e73d082
http://github.com/penberg/jato/commit/4373533bcfc158846e6768871043a4353e73d082
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M jit/linear-scan.c
Log Message:
-----------
jit: cleanup interval spilling
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: 0422c37cf57eb800b0a49024ddc9fa20a4a1c1a6
http://github.com/penberg/jato/commit/0422c37cf57eb800b0a49024ddc9fa20a4a1c1a6
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M include/jit/vars.h
M jit/interval.c
M jit/linear-scan.c
M jit/liveness.c
M jit/spill-reload.c
M jit/trace-jit.c
M test/jit/linear-scan-test.c
M test/jit/live-range-test.c
M test/jit/liveness-test.c
Log Message:
-----------
jit: introduce multiple live ranges per interval.
This is needed for precise modeling of live ranges.
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: 52bec1a5387212ffacd489140e10fdd022ef8c60
http://github.com/penberg/jato/commit/52bec1a5387212ffacd489140e10fdd022ef8c60
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M arch/mmix/include/arch/instruction.h
M arch/x86/include/arch/instruction.h
M arch/x86/instruction.c
M arch/x86/use-def.c
M include/jit/instruction.h
M jit/basic-block.c
M jit/bc-offset-mapping.c
M jit/compilation-unit.c
M jit/emit.c
M jit/liveness.c
M jit/trace-jit.c
M test/jit/compilation-unit-test.c
Log Message:
-----------
jit: move arch independent stuff from arch/instruction.h to jit/instruction.h
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: c0fdecf6c5a5eda9753c63dd039993bd82d4be09
http://github.com/penberg/jato/commit/c0fdecf6c5a5eda9753c63dd039993bd82d4be09
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M arch/x86/include/arch/instruction.h
M arch/x86/instruction.c
M arch/x86/use-def.c
M include/jit/instruction.h
M include/jit/use-position.h
M include/jit/vars.h
M jit/interval.c
M jit/linear-scan.c
M jit/liveness.c
M jit/spill-reload.c
M test/jit/liveness-test.c
M test/jit/spill-reload-test.c
Log Message:
-----------
jit: implement precise live range calculation
For each variable its live range is calculated precisely as described
in Wimmer's master thesis "Linear Scan Register Allocator" in 5.6.3
"Build Intervals".
This patch reduces register allocator stress by generating shorter,
more precise live ranges and therefore reduces number of interval spills.
This patch also introduces distinction between even and odd use
positions. Even use positions represent input to instruction and odd
positions represent output. This allows for better register
utilization. Example:
mov r1, r2
add r2, r3
after allocation:
mov ebx, ebx ; this can be optimized out in the future
add ebx, ebx
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: 3534a32819fea9312b7803da13ffdb5ee39b9a34
http://github.com/penberg/jato/commit/3534a32819fea9312b7803da13ffdb5ee39b9a34
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M arch/x86/insn-selector.brg
Log Message:
-----------
x86: ensure fixed-reg variables are not returned as rule results
Fixed-reg variables should never be used outside a rule. When they are
returned as rule results, they can reach another rule as input
register. If that rule uses fixed register for the same machine
register, the conflict occurs and is not detected. This causes that
result is incorrect.
Lets consider a rule:
reg: OP_DIV(reg, reg)
{
...
select_insn(s, tree, reg_reg_insn(INSN_MOV_REG_REG, state->left->reg1,
eax));
select_insn(s, tree, reg_reg_insn(INSN_CLTD_REG_REG, eax, edx));
select_insn(s, tree, reg_reg_insn(INSN_DIV_REG_REG, state->right->reg1,
eax));
select_insn(s, tree, reg_reg_insn(INSN_MOV_REG_REG, eax, result));
}
It uses fixed variables for EAX and EDX. If another rule puts a fixed
variable for EAX as OP_DIV's right input, then result will be
incorrect because content of EAX is overridden.
This example also shows, that spilling of fixed intervals will not
solve this problem. Instruction INSN_DIV_REG_REG has two inputs:
state->right->reg1 and eax. Suppose that state->right->reg1 is a fixed
variable for eax too. So we would have two fixed intervals with the
same use position. This conflict can not be solved by fixed interval
spilling. It requires reloading one of intervals to another machine
register. This can be done for regular registers.
The conclusion is: we should use fixed-reg variables only to prepare
and save registers around some special instructions. Fixed-reg
variables should not be used in place of regular virtual registers.
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: dc169edad63b3678bfc1dda500cad53e65fae84a
http://github.com/penberg/jato/commit/dc169edad63b3678bfc1dda500cad53e65fae84a
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M arch/mmix/include/arch/instruction.h
M arch/mmix/include/arch/registers.h
M arch/mmix/register.c
M arch/x86/include/arch/instruction.h
M arch/x86/include/arch/registers_32.h
M arch/x86/registers_32.c
M arch/x86/use-def.c
M jit/liveness.c
Log Message:
-----------
jit: force spill of intervals containing caller saved registers before calls.
This closes bug [#7 state:resolved] ("x86: e{b,c,d}x registers are
unavailable for allocation after call instructions").
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: 6710448a4fee5910f0eb0dde144f1e36b44be422
http://github.com/penberg/jato/commit/6710448a4fee5910f0eb0dde144f1e36b44be422
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M jit/compilation-unit.c
M jit/interval.c
M jit/spill-reload.c
Log Message:
-----------
jit: ensure that spill variable has the same vm_type as original variable.
This is a bug fix. The bug caused that floating point variables were
spilled as if they were a general purpose registers which led to
corruption of general purpose registers.
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: 22ec7f0bff23c3a743893c8cfb5cba424857b1d5
http://github.com/penberg/jato/commit/22ec7f0bff23c3a743893c8cfb5cba424857b1d5
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M jit/trace-jit.c
Log Message:
-----------
jit: print variable types in regalloc trace
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: ae551840441013fd594791cfbf1d2a036701263a
http://github.com/penberg/jato/commit/ae551840441013fd594791cfbf1d2a036701263a
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M arch/mmix/include/arch/instruction.h
M arch/mmix/instruction.c
M arch/x86/emit-code.c
M arch/x86/include/arch/instruction.h
M arch/x86/include/arch/stack-frame.h
M arch/x86/insn-selector.brg
M arch/x86/instruction.c
M arch/x86/stack-frame.c
M include/jit/stack-slot.h
M include/vm/types.h
M jit/spill-reload.c
M jit/stack-slot.c
Log Message:
-----------
jit: fix spilling of 64-bit registers.
This cleans handling of 64-bit stack slots up and fixes the buggy spilling code.
We always allocated 32-bit spill slot regardless of register type which caused
memory corruption.
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: 0ba2cd072c64fe36bdfad55b3b9f16f36e746bae
http://github.com/penberg/jato/commit/0ba2cd072c64fe36bdfad55b3b9f16f36e746bae
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M jit/linear-scan.c
Log Message:
-----------
jit: do not put to inactive list fixed reg intervals for ESP and EBP
Those register are not considered for allocation and their numbers are
> NR_REGISTERS. Letting those fixed intervals into register allocator
can cause memory corruption becuase use position arrays are of size
NR_REGISTERS.
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: 9706450480ae948e93f9c3ffa29f86ec2ccae8ba
http://github.com/penberg/jato/commit/9706450480ae948e93f9c3ffa29f86ec2ccae8ba
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M jit/linear-scan.c
Log Message:
-----------
jit: optimize register use and block position calculation in regalloc
With multiple ranges per interval it is expensive to calculate
interval intersection. We do not have to check intersection between
current and intervals which have incompatible register type. That's
because this information will not be used after all. pick_register()
will not consider those registers. For example, we do not have to
check at which position XMM0 register is available if we are
allocating a general purpose register.
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: b41a5d6da5fa6a64e1011ed3f2010f4d0cee47a1
http://github.com/penberg/jato/commit/b41a5d6da5fa6a64e1011ed3f2010f4d0cee47a1
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M arch/x86/emit-code.c
M arch/x86/include/arch/stack-frame.h
Log Message:
-----------
x86: remove unconditional saving and restoring of XMM registers
This closes bug [#5 state:resolved] ("SSE registers are saved and
registered unconditionally").
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
Commit: d0673929aeabe374f088f5f6d98776eefd8d8314
http://github.com/penberg/jato/commit/d0673929aeabe374f088f5f6d98776eefd8d8314
Author: Tomek Grabiec <tgrab...@gmail.com>
Date: 2009-08-31 (Mon, 31 Aug 2009)
Changed paths:
M include/jit/vars.h
M jit/interval.c
M jit/linear-scan.c
Log Message:
-----------
jit: cleanup handling of expired ranges of intervals
Having ->current_range in struct interval is very error prone.
Instead of that, we maintain a list of expired ranges, which are moved
from range_list and are no longer considered as interval's
ranges. After linear scan expired ranges are restored.
This fixes a crash in trace_var_liveness().
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
Signed-off-by: Pekka Enberg <penb...@cs.helsinki.fi>
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