This adds definitions for XMM regs on x86-64.
Signed-off-by: Eduard - Gabriel Munteanu <eduard.munte...@linux360.ro>
---
arch/x86/include/arch/registers_64.h | 9 +++++++++
arch/x86/registers_64.c | 9 +++++++++
2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/arch/registers_64.h
b/arch/x86/include/arch/registers_64.h
index 5efa48a..faa3e80 100644
--- a/arch/x86/include/arch/registers_64.h
+++ b/arch/x86/include/arch/registers_64.h
@@ -22,6 +22,15 @@ enum machine_reg {
MACH_REG_R14,
MACH_REG_R15,
+ MACH_REG_XMM0,
+ MACH_REG_XMM1,
+ MACH_REG_XMM2,
+ MACH_REG_XMM3,
+ MACH_REG_XMM4,
+ MACH_REG_XMM5,
+ MACH_REG_XMM6,
+ MACH_REG_XMM7,
+
/* The above registers are available for register allocator. */
NR_REGISTERS,
diff --git a/arch/x86/registers_64.c b/arch/x86/registers_64.c
index 641c3f8..5fb91c3 100644
--- a/arch/x86/registers_64.c
+++ b/arch/x86/registers_64.c
@@ -83,6 +83,15 @@ bool reg_supports_type(enum machine_reg reg, enum vm_type
type)
* now to work around a reg-alloc bug. */
[MACH_REG_RSI] = GPR_64 | GPR_32 | GPR_16 | GPR_8,
[MACH_REG_RDI] = GPR_64 | GPR_32 | GPR_16 | GPR_8,
+
+ [MACH_REG_XMM0] = FPU,
+ [MACH_REG_XMM1] = FPU,
+ [MACH_REG_XMM2] = FPU,
+ [MACH_REG_XMM3] = FPU,
+ [MACH_REG_XMM4] = FPU,
+ [MACH_REG_XMM5] = FPU,
+ [MACH_REG_XMM6] = FPU,
+ [MACH_REG_XMM7] = FPU,
};
assert(reg < NR_REGISTERS);
--
1.6.0.6
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