PatchSet 7692
Date: 2008/01/19 15:13:36
Author: robilad
Branch: HEAD
Tag: (none)
Log:
cleaned out dead code, fixed build for --std=gnu99 and unified gc-refs.c
2008-01-19 Dalibor Topic <[EMAIL PROTECTED]>
* config/alpha/jit-alpha.def,
config/alpha/jit-icode.h,
config/alpha/linux/md.c,
config/alpha/netbsd1/md.c,
config/alpha/osf/md.c,
config/arm/jit-arm.def,
config/arm/jit3-arm.def,
config/bfin/jit-bfin.def,
config/bfin/jit3-bfin.def,
config/ia64/linux/md.h,
config/m68k/jit3-m68k.def,
config/mips/mips.c,
config/powerpc/callmethod_ppc.h,
config/powerpc/jit3-icode.h,
config/powerpc/jit3-powerpc.def,
config/powerpc/netbsd1/md.c,
config/sparc/jit-sparc.def.
kaffe/kaffevm/classMethod.c,
kaffe/kaffevm/classPool.c,
kaffe/kaffevm/exception.c,
kaffe/kaffevm/findInJar.c,
kaffe/kaffevm/kaffe.def,
kaffe/kaffevm/soft.c,
kaffe/kaffevm/string.c,
kaffe/kaffevm/gcj/eh.c,
kaffe/kaffevm/gcj/gcj-glue.c,
kaffe/kaffevm/jit/labels.c,
kaffe/kaffevm/jit/methodcalls.c,
kaffe/kaffevm/jit/native-wrapper.c,
kaffe/kaffevm/jit3/icode.c,
kaffe/kaffevm/jit3/machine.c,
kaffe/kaffevm/jit3/registers.h,
kaffe/kaffevm/jni/jni.c,
kaffe/kaffevm/systems/oskit-pthreads/pjthread.c,
kaffe/kaffevm/systems/unix-jthreads/jthread.c,
kaffe/kaffevm/systems/win32/winio.c,
kaffe/xprof/xprofiler.c,
libraries/clib/native/Class.c:
Removed ifdef-ed out code.
* config/i386/callKaffeException.h,
config/i386/common.h,
config/i386/sysdepCallMethod.h:
Use __asm__ instead of asm.
* kaffe/kaffevm/Makefile.am (libkaffe_la_SOURCES): Added gc-refs.c.
* kaffe/kaffevm/gc-refs.c: New file. Moved most of the code from
kaffe/kaffevm/kaffe-gc/gc-refs.c here, and added KaffeGC_markAllRefs.
* kaffe/kaffevm/kaffe-gc/gc-refs.c, kaffe/kaffevm/boehm-gc/gc-refs.c:
Removed.
* kaffe/kaffevm/kaffe-gc/gc-krefs.c: New file. Moved over the thread
walking functions necessary for kaffe-gc that don't fit into the shared
gc-refs.c implementation.
* kaffe/kaffevm/boehm-gc/gc-brefs.c,
kaffe/kaffevm/boehm-gc/gc-brefs.h: New files.
* kaffe/kaffevm/gc-refs.h (KaffeGC_walkRefs) Removed.
(KaffeGC_markAllRefs) Added.
* kaffe/kaffevm/jar.c (openJarFile) Use S_ISDIR.
* kaffe/kaffevm/kaffe.def (FIELD_IS_CONSTANT): Removed.
(GETSTATIC) Removed uses of FIELD_IS_CONSTANT.
* kaffe/kaffevm/soft.c: Removed inline statements.
* kaffe/kaffevm/utf8const.c: Spell out unsigned int.
* kaffe/kaffevm/boehm-gc/Makefile.am (libkaffegc_la_SOURCES):
Removed gc-refs.c, added gc-brefs.c and gc-brefs.h.
* kaffe/kaffevm/boehm-gc/gc2.c: Include gc-brefs.h.
(GarbageCollectorInterface_Ops) Use BoehmGC_addRef and BoehmGC_rmRef
wrappers instead of using KaffeGC_addRef and KaffeGC_rmRef directly.
* kaffe/kaffevm/kaffe-gc/Makefile.am (libkaffegc_la_SOURCES):
Removed gc-refs.c. Added gc-krefs.c.
* kaffe/kaffevm/kaffe-gc/gc-incremental.h (KaffeGC_walkRefs):
Added prototype.
* kaffe/kaffevm/systems/unix-pthreads/thread-impl.c (resume_signal_handler,
jthread_unsuspendall) Declare status variable in the scope it is used.
Members:
config/alpha/jit-alpha.def:1.14->1.15
config/alpha/jit-icode.h:INITIAL->1.5
config/alpha/linux/md.c:1.5->1.6
config/alpha/netbsd1/md.c:1.3->1.4
config/alpha/osf/md.c:1.10->1.11
config/arm/jit-arm.def:1.9->1.10
config/arm/jit3-arm.def:1.10->1.11
config/bfin/jit-bfin.def:1.1->1.2
config/bfin/jit3-bfin.def:1.1->1.2
config/i386/callKaffeException.h:1.1->1.2
config/i386/common.h:1.22->1.23
config/i386/sysdepCallMethod.h:INITIAL->1.4
config/ia64/linux/md.h:1.2->1.3
config/m68k/jit3-m68k.def:1.16->1.17
config/mips/mips.c:INITIAL->1.15
config/powerpc/callmethod_ppc.h:1.5->1.6
config/powerpc/jit3-icode.h:1.4->1.5
config/powerpc/jit3-powerpc.def:1.11->1.12
config/powerpc/netbsd1/md.c:1.4->1.5
config/sparc/jit-sparc.def:1.16->1.17
kaffe/kaffevm/Makefile.am:1.108->1.109
kaffe/kaffevm/Makefile.in:1.278->1.279
kaffe/kaffevm/classMethod.c:1.161->1.162
kaffe/kaffevm/classPool.c:1.42->1.43
kaffe/kaffevm/exception.c:1.109->1.110
kaffe/kaffevm/findInJar.c:1.75->1.76
kaffe/kaffevm/gc-refs.c:INITIAL->1.1
kaffe/kaffevm/gc-refs.h:1.1->1.2
kaffe/kaffevm/jar.c:1.43->1.44
kaffe/kaffevm/kaffe.def:1.45->1.46
kaffe/kaffevm/soft.c:1.82->1.83
kaffe/kaffevm/string.c:1.51->1.52
kaffe/kaffevm/utf8const.c:1.53->1.54
kaffe/kaffevm/boehm-gc/Makefile.am:1.14->1.15
kaffe/kaffevm/boehm-gc/Makefile.in:1.90->1.91
kaffe/kaffevm/boehm-gc/gc-brefs.c:INITIAL->1.1
kaffe/kaffevm/boehm-gc/gc-brefs.h:INITIAL->1.1
kaffe/kaffevm/boehm-gc/gc-refs.c:1.10->1.11(DEAD)
kaffe/kaffevm/boehm-gc/gc2.c:1.17->1.18
kaffe/kaffevm/gcj/eh.c:1.5->1.6
kaffe/kaffevm/gcj/gcj-glue.c:1.12->1.13
kaffe/kaffevm/jit/labels.c:1.15->1.16
kaffe/kaffevm/jit/methodcalls.c:1.14->1.15
kaffe/kaffevm/jit/native-wrapper.c:1.15->1.16
kaffe/kaffevm/jit3/icode.c:1.61->1.62
kaffe/kaffevm/jit3/machine.c:1.86->1.87
kaffe/kaffevm/jit3/registers.h:1.11->1.12
kaffe/kaffevm/jni/jni.c:1.48->1.49
kaffe/kaffevm/kaffe-gc/Makefile.am:1.10->1.11
kaffe/kaffevm/kaffe-gc/Makefile.in:1.88->1.89
kaffe/kaffevm/kaffe-gc/gc-incremental.h:1.9->1.10
kaffe/kaffevm/kaffe-gc/gc-krefs.c:INITIAL->1.1
kaffe/kaffevm/kaffe-gc/gc-refs.c:1.18->1.19(DEAD)
kaffe/kaffevm/systems/oskit-pthreads/pjthread.c:1.13->1.14
kaffe/kaffevm/systems/unix-jthreads/jthread.c:1.145->1.146
kaffe/kaffevm/systems/unix-pthreads/thread-impl.c:1.97->1.98
kaffe/kaffevm/systems/win32/winio.c:1.3->1.4
kaffe/xprof/xprofiler.c:1.10->1.11
libraries/clib/native/Class.c:1.93->1.94
Index: kaffe/config/alpha/jit-alpha.def
diff -u kaffe/config/alpha/jit-alpha.def:1.14
kaffe/config/alpha/jit-alpha.def:1.15
--- kaffe/config/alpha/jit-alpha.def:1.14 Fri May 6 15:24:23 2005
+++ kaffe/config/alpha/jit-alpha.def Sat Jan 19 15:13:36 2008
@@ -2301,12 +2301,6 @@
op_sextb(w, w);
}
else {
-#if 0
- op_ldq_u(w, r, 0);
- op_addq_i(r, 1, REG_at);
- op_extqh(w, REG_at, w);
- op_sra_i(w, 56, w);
-#endif
op_mov(r, REG_at);
op_ldq_u(w, r, 0);
op_extbl(w, REG_at, w);
@@ -2551,80 +2545,6 @@
}
}
-#if 0
-/* These functions does not work correctly, use soft_cvtXX */
-
-define_insn(cvt_float_int, cvtfi_RxR)
-{
- int r = rreg_float(2);
- int w = wreg_float(0);
-
- alpha_jit_info.ieee = 1;
- if (r == w) {
- /* XXX allocate three temp registers ? */
- op_cvtst_s(r, REG_ft);
- op_trapb();
- op_cvttq_svc(REG_ft, w);
- op_trapb();
- op_cvtql_sv(w, REG_ft);
- op_trapb();
- op_fmov(REG_ft, w);
- }
- else {
- op_cvtst_s(r, w);
- op_cvttq_svc(w, REG_ft);
- /* XXX allocate another temp register ? */
- op_trapb();
- op_cvtql_sv(REG_ft, w);
- op_trapb();
- }
-}
-
-define_insn(cvt_float_long, cvtfl_RxR)
-{
- int r = rreg_float(2);
- int w = wreg_double(0);
-
- alpha_jit_info.ieee = 1;
- op_cvtst_s(r, REG_ft);
- if (r == w) {
- /* XXX allocate another temp register ? */
- op_trapb();
- }
- op_cvttq_svc(REG_ft, w);
- op_trapb();
-}
-
-define_insn(cvt_double_int, cvtdi_RxR)
-{
- int r = rreg_double(2);
- int w = wreg_float(0);
-
- alpha_jit_info.ieee = 1;
- op_cvttq_svc(r, REG_ft);
- if (r == w) {
- /* XXX allocate another temp register ? */
- op_trapb();
- }
- op_cvtql_sv(REG_ft, w);
- op_trapb();
-}
-
-define_insn(cvt_double_long, cvtdl_RxR)
-{
- int r = rreg_double(2);
- int w = wreg_double(0);
- int t = (r == w) ? REG_ft : w;
-
- alpha_jit_info.ieee = 1;
- op_cvttq_svc(r, t);
- op_trapb();
- if (t == REG_ft) {
- op_fmov(t, w);
- }
-}
-#endif
-
define_insn(cvt_float_double, cvtfd_RxR)
{
int r = rreg_float(2);
@@ -2913,18 +2833,6 @@
label* l = const_label(1);
assert(const_int(2) == ba);
-
-#if 0
- /* For normal function calls, these should have been flushed
- already. For specials like soft_badarrayindex that aren't
- considered in the the normal basic block divisions, this
- is in fact wrong, because this flush isn't happening before
- the test, and so we'll later think that the up-to-date
- value for the slot is on the stack when it isn't. */
- clobberRegister(REG_pv);
- clobberRegister(REG_ra);
-#endif
-
alpha_move_const_pool(REG_pv, l, CPref, l->to, op_ldq);
op_jsr(REG_ra, REG_pv, 0);
===================================================================
Checking out kaffe/config/alpha/jit-icode.h
RCS: /home/cvs/kaffe/kaffe/config/alpha/jit-icode.h,v
VERS: 1.5
***************
--- /dev/null Sun Aug 4 19:57:58 2002
+++ kaffe/config/alpha/jit-icode.h Sat Jan 19 15:15:09 2008
@@ -0,0 +1,276 @@
+/* alpha/jit-icode.h
+ * Define the instructions which are present on the Alpha.
+ *
+ * Copyright (c) 1996, 1997
+ * Transvirtual Technologies, Inc. All rights reserved.
+ *
+ * See the file "license.terms" for information on usage and redistribution
+ * of this file.
+ */
+
+#ifndef __alpha_jit_icode_h
+#define __alpha_jit_icode_h
+
+
+/*
+ * Size of longs compared to refs.
+ */
+#define pusharg_long_idx_inc 1
+
+/*
+ * Define the range checking macros.
+ */
+
+#define alpha_zero_rangecheck(v) ((v) == 0)
+#define alpha_u8_rangecheck(v) ((v) >= 0 && (v) <= 0xFF)
+#define alpha_s9_rangecheck(v) ((v) >= -0xFF && (v) <= 0xFF)
+#define alpha_s16_rangecheck(v) ((v) >= -0x8000 && (v) < 0x8000)
+#define alpha_s32_rangecheck(v) ((v) >= -0x80000000L && (v) <
0x80000000L)
+
+extern int alpha_andconst_rangecheck(long v);
+
+/*
+ * These must be defined for any architecture.
+ */
+
+#define HAVE_prologue prologue_xxC
+#define HAVE_epilogue epilogue_xxx
+#define HAVE_exception_prologue eprologue_xxx
+
+#define HAVE_spill_int spilli_RCx
+#define HAVE_spill_float spillf_RCx
+#define HAVE_spill_double spilld_RCx
+#define HAVE_reload_int reloadi_RCx
+#define HAVE_reload_float reloadf_RCx
+#define HAVE_reload_double reloadd_RCx
+
+#define HAVE_move_int_const movei_RxC
+#define HAVE_move_int movei_RxR
+#define HAVE_move_float_const movef_RxC
+#define HAVE_move_float movef_RxR
+#define HAVE_move_double_const moved_RxC
+#define HAVE_move_double moved_RxR
+#define HAVE_move_label_const move_RxL
+
+#define HAVE_move_int_const_rangecheck(v) (1)
+#define HAVE_move_float_const_rangecheck(v) (1)
+#define HAVE_move_double_const_rangecheck(v) (1)
+
+#define HAVE_add_int addi_RRR
+#define HAVE_sub_int subi_RRR
+#define HAVE_and_int andi_RRR
+#define HAVE_or_int ori_RRR
+#define HAVE_xor_int xori_RRR
+#define HAVE_ashr_int ashri_RRR
+#define HAVE_lshr_int lshri_RRR
+#define HAVE_lshl_int lshli_RRR
+
+#define HAVE_add_float addf_RRR
+#define HAVE_sub_float subf_RRR
+#define HAVE_mul_float mulf_RRR
+#define HAVE_div_float divf_RRR
+
+#define HAVE_add_double addd_RRR
+#define HAVE_sub_double subd_RRR
+#define HAVE_mul_double muld_RRR
+#define HAVE_div_double divd_RRR
+
+#define HAVE_load_int loadi_RxR
+#define HAVE_store_int storei_xRR
+
+#define HAVE_load_float loadf_RxR
+#define HAVE_store_float storef_xRR
+#define HAVE_load_double loadd_RxR
+#define HAVE_store_double stored_xRR
+
+#define HAVE_pusharg_int pushi_xRC
+#define HAVE_pusharg_float pushf_xRC
+#define HAVE_pusharg_double pushd_xRC
+#define HAVE_popargs popargs_xxC
+
+#define HAVE_cbranch_int cbranchi_xRRLC
+
+#define HAVE_branch branch_xCC
+#define HAVE_branch_indirect branch_indirect_xRC
+#define HAVE_call_ref call_xCC
+#define HAVE_call call_xRC
+
+#define HAVE_return_int returni_Rxx
+#define HAVE_return_ref returnr_Rxx
+#define HAVE_return_long returnl_Rxx
+#define HAVE_return_float returnf_Rxx
+#define HAVE_return_double returnd_Rxx
+
+#define HAVE_returnarg_int returnargi_xxR
+#define HAVE_returnarg_ref returnargr_xxR
+#define HAVE_returnarg_long returnargl_xxR
+#define HAVE_returnarg_float returnargf_xxR
+#define HAVE_returnarg_double returnargd_xxR
+
+#define HAVE_set_label set_label_xxC
+#define HAVE_build_key set_word_xxC
+#define HAVE_build_code_ref set_wordpc_xxC
+#define HAVE_load_code_ref loadpc_RxR
+
+#define HAVE_cvt_int_double cvtid_RxR
+#define HAVE_cvt_int_float cvtif_RxR
+#define HAVE_cvt_float_double cvtfd_RxR
+#define HAVE_cvt_double_float cvtdf_RxR
+
+
+/*
+ * These must be defined for 64-bit architectures.
+ */
+
+#define HAVE_spill_ref spillr_RCx
+#define HAVE_spill_long spilll_RCx
+#define HAVE_reload_ref reloadr_RCx
+#define HAVE_reload_long reloadl_RCx
+
+#define HAVE_move_ref_const mover_RxC
+#define HAVE_move_long_const movel_RxC
+#define HAVE_move_ref mover_RxR
+#define HAVE_move_long movel_RxR
+#define HAVE_move_any mover_RxR
+
+#define HAVE_move_ref_const_rangecheck(v) (1)
+#define HAVE_move_long_const_rangecheck(v) (1)
+
+#define HAVE_add_ref addr_RRR
+#define HAVE_add_long addl_RRR
+
+#define HAVE_load_ref loadr_RxR
+#define HAVE_load_long loadl_RxR
+#define HAVE_store_ref storer_xRR
+#define HAVE_store_long storel_xRR
+
+#define HAVE_pusharg_ref pushr_xRC
+#define HAVE_pusharg_long pushl_xRC
+
+#define HAVE_cbranch_ref cbranchr_xRRLC
+
+/*
+ * This one is needed for proper exception handling if you can't
+ * backtrace C code.
+ */
+
+#define HAVE_call_soft call_soft_xCC
+
+/*
+ * These are optional but help to optimise the code generated.
+ */
+
+#define HAVE_add_int_const addi_RRC
+#define HAVE_sub_int_const subi_RRC
+#define HAVE_pusharg_int_const pushi_xCC
+#define HAVE_load_offset_int loadi_RRC
+#define HAVE_store_offset_int storei_xRRC
+#define HAVE_lshl_int_const lshli_RRC
+#define HAVE_cbranch_int_const cbranchi_xRCLC
+
+#define HAVE_add_int_const_rangecheck(v) alpha_s9_rangecheck(v)
+#define HAVE_sub_int_const_rangecheck(v) alpha_s9_rangecheck(v)
+#define HAVE_pusharg_int_const_rangecheck(v) (1)
+#define HAVE_load_offset_int_rangecheck(v) alpha_s16_rangecheck(v)
+#define HAVE_store_offset_int_rangecheck(v) alpha_s16_rangecheck(v)
+#define HAVE_lshl_int_const_rangecheck(v) (1)
+#define HAVE_cbranch_int_const_rangecheck(v) alpha_s9_rangecheck(v)
+
+#define HAVE_load_byte loadb_RxR
+#define HAVE_load_char loadc_RxR
+#define HAVE_load_short loads_RxR
+#define HAVE_store_byte storeb_xRR
+#define HAVE_store_char stores_xRR
+#define HAVE_store_short stores_xRR
+
+/*
+ * These are optional if the architecture supports them.
+ */
+
+#define HAVE_mul_int_const muli_RRC
+#define HAVE_mul_int muli_RRR
+#define HAVE_div_int divi_RRR
+#define HAVE_rem_int remi_RRR
+#define HAVE_neg_int negi_RxR
+#define HAVE_and_int_const andi_RRC
+#define HAVE_ashr_int_const ashri_RRC
+#define HAVE_lshr_int_const lshri_RRC
+
+#define HAVE_mul_int_const_rangecheck(v) alpha_u8_rangecheck(v)
+#define HAVE_and_int_const_rangecheck(v) alpha_andconst_rangecheck(v)
+#define HAVE_ashr_int_const_rangecheck(v) (1)
+#define HAVE_lshr_int_const_rangecheck(v) (1)
+
+#define HAVE_add_ref_const addr_RRC
+#define HAVE_pusharg_ref_const pushr_xCC
+
+#define HAVE_add_ref_const_rangecheck(v) alpha_s16_rangecheck(v)
+#define HAVE_pusharg_ref_const_rangecheck(v) (1)
+
+#define HAVE_add_long_const addl_RRC
+#define HAVE_sub_long_const subl_RRC
+#define HAVE_sub_long subl_RRR
+#define HAVE_mul_long_const mull_RRC
+#define HAVE_mul_long mull_RRR
+#define HAVE_div_long divl_RRR
+#define HAVE_rem_long reml_RRR
+#define HAVE_neg_long negl_RxR
+#define HAVE_and_long_const andl_RRC
+#define HAVE_and_long andl_RRR
+#define HAVE_or_long orl_RRR
+#define HAVE_xor_long xorl_RRR
+#define HAVE_ashr_long_const ashrl_RRC
+#define HAVE_ashr_long ashrl_RRR
+#define HAVE_lshr_long_const lshrl_RRC
+#define HAVE_lshr_long lshrl_RRR
+#define HAVE_lshl_long_const lshll_RRC
+#define HAVE_lshl_long lshll_RRR
+
+#define HAVE_add_long_const_rangecheck(v) alpha_s16_rangecheck(v)
+#define HAVE_sub_long_const_rangecheck(v)
alpha_s16_rangecheck(-(v))
+#define HAVE_pusharg_long_const_rangecheck(v) (1)
+#define HAVE_mul_long_const_rangecheck(v) alpha_u8_rangecheck(v)
+#define HAVE_and_long_const_rangecheck(v) alpha_andconst_rangecheck(v)
+#define HAVE_ashr_long_const_rangecheck(v) (1)
+#define HAVE_lshr_long_const_rangecheck(v) (1)
+#define HAVE_lshl_long_const_rangecheck(v) (1)
+
+#define HAVE_load_offset_ref loadr_RRC
+#define HAVE_load_offset_long loadl_RRC
+#define HAVE_store_offset_ref storer_xRRC
+#define HAVE_store_offset_long storel_xRRC
+#define HAVE_cbranch_ref_const cbranchr_xRCLC
+
+#define HAVE_load_offset_ref_rangecheck(v) alpha_s16_rangecheck(v)
+#define HAVE_load_offset_long_rangecheck(v) alpha_s16_rangecheck(v)
+#define HAVE_store_offset_ref_rangecheck(v) alpha_s16_rangecheck(v)
+#define HAVE_store_offset_long_rangecheck(v) alpha_s16_rangecheck(v)
+#define HAVE_cbranch_ref_const_rangecheck(v) alpha_s16_rangecheck(v)
+
+#undef HAVE_swap_int
+#undef HAVE_swap_long
+
+#define HAVE_lcmp lcmp_RRR
+
+#define HAVE_neg_float negf_RxR
+#define HAVE_neg_double negd_RxR
+
+#undef HAVE_rem_float
+#undef HAVE_rem_double
+
+#define HAVE_cvt_int_byte cvtib_RxR
+#define HAVE_cvt_int_short cvtis_RxR
+#define HAVE_cvt_int_long cvtil_RxR
+#define HAVE_cvt_long_int cvtli_RxR
+#define HAVE_cvt_long_double cvtld_RxR
+#define HAVE_cvt_long_float cvtlf_RxR
+
+
+#undef HAVE_cvt_float_int
+#undef HAVE_cvt_float_int_ieee
+#undef HAVE_cvt_double_int
+#undef HAVE_cvt_double_int_ieee
+#undef HAVE_cvt_float_long
+#undef HAVE_cvt_double_long
+
+#endif
Index: kaffe/config/alpha/linux/md.c
diff -u kaffe/config/alpha/linux/md.c:1.5 kaffe/config/alpha/linux/md.c:1.6
--- kaffe/config/alpha/linux/md.c:1.5 Fri Aug 3 17:39:45 2001
+++ kaffe/config/alpha/linux/md.c Sat Jan 19 15:13:37 2008
@@ -19,47 +19,12 @@
void
init_md(void)
{
-#if 0 /* This breaks DoublePrint and DoubleComp tests. */
- /* Set the software emulation bits in the kernel for
- those that don't implement all of the fpcr bits. */
- ieee_set_fp_control(IEEE_TRAP_ENABLE_INV);
-#endif
-
-#if 0 /* This doesn't seem to make any difference, but let's keep it. */
- /* Set the bits in the hw fpcr for cpu's that do. */
- __asm__ __volatile__(
- "excb\n\t"
- "mt_fpcr %0\n\t"
- "excb"
- : : "f"(FPCR_INED | FPCR_UNFD | FPCR_DYN_NORMAL
- | FPCR_OVFD | FPCR_DZED));
-#endif
-
#if defined(HAVE_MALLOPT)
/* Turn off the use of mmap in malloc so that we have a
continuous heap to present to the gc. */
mallopt(M_MMAP_MAX, 0);
#endif
}
-
-#if 0
-/* This bit turns off unaligned access fixups in favour of SIGBUS. It
- is not called by Kaffe, but it is useful to invoke from within gdb.
- It talks to a patch that will likely be included in 2.1.22 or .23,
- so if you don't have that you'll need to ifdef this out. */
-
-#include <asm/sysinfo.h>
-#include <asm/unistd.h>
-
-void alpha_disable_uac()
-{
- int buf[2];
-
- buf[0] = SSIN_UACPROC;
- buf[1] = UAC_SIGBUS;
- syscall(__NR_setsysinfo, SSI_NVPAIRS, buf, 1, 0, 0);
-}
-#endif
#if defined(TRANSLATOR)
#include "alpha/alpha.c"
Index: kaffe/config/alpha/netbsd1/md.c
diff -u kaffe/config/alpha/netbsd1/md.c:1.3 kaffe/config/alpha/netbsd1/md.c:1.4
--- kaffe/config/alpha/netbsd1/md.c:1.3 Wed May 21 08:40:41 2003
+++ kaffe/config/alpha/netbsd1/md.c Sat Jan 19 15:13:37 2008
@@ -49,15 +49,6 @@
"excb"
: : "f"(FPCR_INED | FPCR_UNFD | FPCR_DYN_NORMAL
| FPCR_OVFD | FPCR_DZED));
-
-#if 0
-/* This code does not work on NetBSD and I do not have a clue why.
- Disable it until forced to fix it, or someone else fixes it. */
-
- /* Set the software emulation bits in the kernel for
- those that don't. */
- ieee_set_fp_control(IEEE_TRAP_ENABLE_INV);
-#endif
}
#if defined(TRANSLATOR)
Index: kaffe/config/alpha/osf/md.c
diff -u kaffe/config/alpha/osf/md.c:1.10 kaffe/config/alpha/osf/md.c:1.11
--- kaffe/config/alpha/osf/md.c:1.10 Fri Dec 30 18:38:52 2005
+++ kaffe/config/alpha/osf/md.c Sat Jan 19 15:13:38 2008
@@ -45,23 +45,6 @@
{
/* `Alpha Architecture Handbook' say that's user mode _must
not_ change fpcr but use OS function as next one. */
-#if 0
- /* Set the bits in the hw fpcr for cpu's that implement
- all the bits. */
- __asm__ __volatile__(
- "excb\n\t"
- "mt_fpcr %0\n\t"
- "excb"
- : : "f"(FPCR_INED | FPCR_UNFD | FPCR_DYN_NORMAL
- | FPCR_OVFD | FPCR_DZED));
-#endif
-
-#if 0 /* This breaks DoublePrint and DoubleComp tests. */
- /* Set the software emulation bits in the kernel for
- those that don't. */
- ieee_set_fp_control(IEEE_TRAP_ENABLE_INV);
-#endif
-
#if defined(USE_LIBEXC)
initStaticLock(&excLock);
#endif
@@ -126,11 +109,6 @@
else {
/* No table found, is this method GCed after throw but
before printStackTrace() ??? */
-#if 0
- DBG(STACKTRACE,
- dprintf ("__alpha_osf_nextFrame(): no PDSC_RPD for pc %p\n",
- (void*)frame->sc.sc_pc); );
-#endif
frame->sc.sc_pc = 0;
}
unlockStaticMutex (&excLock);
@@ -173,13 +151,7 @@
pdsc->crd[1].words.rpd_offset = 0;
/* create Runtime Procedure Descriptor */
-#if 0
- /* With -ieee, GCC alway add .eflag 48 event if function does
- not use float nor double. */
- pdsc->rpd.flags = PDSC_EXC_IEEE;
-#else
pdsc->rpd.flags = (alpha_jit_info.ieee ? PDSC_EXC_IEEE : 0);
-#endif
pdsc->rpd.entry_ra = 26;
pdsc->rpd.rsa_offset = rsa_offset;
pdsc->rpd.sp_set = alpha_jit_info.sp_set;
Index: kaffe/config/arm/jit-arm.def
diff -u kaffe/config/arm/jit-arm.def:1.9 kaffe/config/arm/jit-arm.def:1.10
--- kaffe/config/arm/jit-arm.def:1.9 Sat Jul 21 17:39:26 2007
+++ kaffe/config/arm/jit-arm.def Sat Jan 19 15:13:38 2008
@@ -418,13 +418,6 @@
#define op_eor(T,F1,F2) op_rrr(CC_AL,ALU_EOR,SFT_LSLC,0,T,F1,F2)
#define op_eor_const(T,F1,I8) op_rrr(CC_AL,ALU_EOR | ALU_OP_IMMED,
SFT_LSLC, 0, T, F1, I8 & 0xff)
-#if 0
-/* defined differently below --- why? */
-#define op_ashr(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_ASR,(F2)<<1,T,0,F1)
-#define op_lshr(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_LSR,(F2)<<1,T,0,F1)
-#define op_lshl(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_LSL,(F2)<<1,T,0,F1)
-#endif
-
/*
*
* These use the register-specified shift forms.
@@ -1367,20 +1360,6 @@
debug(("cvt_double_int %d, %d\n", w, r));
}
-#if 0
-/* these aren't being used */
-define_insn(cvt_long_float, cvtlf_RxR)
-{
- /* Is a long a 64-bit quantity? */
- debug(("NOT IMPLEMENTED: cvt_long_float\n"));
-}
-
-define_insn(cvt_long_double, cvtld_RxR)
-{
- debug(("NOT IMPLEMENTED: cvt_long_double\n"));
- }
-#endif
-
define_insn(cvt_float_double, cvtfd_RxR)
{
int r = rreg_float(2);
@@ -1478,26 +1457,6 @@
debug(("branch type %d at 0x%x from 0x%x\n", bt, l -> at, l -> from));
}
-
-#if 0
-define_insn(call_ref, call_xCC)
-{
- label* l = const_label(1);
- assert(const_int(2) == ba);
-
- //
- // What's the point if it doesn't fit in a 24-bit
- // displacement?
- //
- assert((abs(CODEPC-ba) & 0x00ffffff) == 0 );
-
- l->type |= Llong26|Lrelative;
- l->at = CODEPC;
- l->from = CODEPC + 8;
-
- op_branch_linked(CC_AL, 0);
-}
-#endif
define_insn(call, call_xRC)
{
Index: kaffe/config/arm/jit3-arm.def
diff -u kaffe/config/arm/jit3-arm.def:1.10 kaffe/config/arm/jit3-arm.def:1.11
--- kaffe/config/arm/jit3-arm.def:1.10 Mon Jul 2 19:38:45 2007
+++ kaffe/config/arm/jit3-arm.def Sat Jan 19 15:13:38 2008
@@ -418,13 +418,6 @@
#define op_eor(T,F1,F2) op_rrr(CC_AL,ALU_EOR,SFT_LSLC,0,T,F1,F2)
#define op_eor_const(T,F1,I8) op_rrr(CC_AL,ALU_EOR | ALU_OP_IMMED,
SFT_LSLC, 0, T, F1, I8 & 0xff)
-#if 0
-/* defined differently below --- why? */
-#define op_ashr(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_ASR,(F2)<<1,T,0,F1)
-#define op_lshr(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_LSR,(F2)<<1,T,0,F1)
-#define op_lshl(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_LSL,(F2)<<1,T,0,F1)
-#endif
-
/*
*
* These use the register-specified shift forms.
@@ -1485,20 +1478,6 @@
debug(("cvt_double_int %d, %d\n", w, r));
}
-#if 0
-/* these aren't being used */
-define_insn(cvt_long_float, cvtlf_RxR)
-{
- /* Is a long a 64-bit quantity? */
- debug(("NOT IMPLEMENTED: cvt_long_float\n"));
-}
-
-define_insn(cvt_long_double, cvtld_RxR)
-{
- debug(("NOT IMPLEMENTED: cvt_long_double\n"));
- }
-#endif
-
define_insn(cvt_float_double, cvtfd_RxR)
{
int r = rreg_float(2);
@@ -1881,35 +1860,6 @@
}
/* --------------------------------------------------------------------- */
-
-#if 0
-/*
- * We use to use this version of the fakecall system but it uses way
- * to many constant pool entries. Since it's not time critical we
- * use the new lower version which doesn't use the constant pool but
- * instead constructs the relevant addresses byte by byte.
- */
-define_insn(fake_call_constpool, fakecall_xCC)
-{
- label* tol = const_label(2);
- label* froml = const_label(1);
-
- froml->type = Lconstant | Labsolute | Loffset12;
- froml->at = CODEPC;
-
- op_load_offset(LR, CONSTPOOL_BASE, -128);
- debug(("load_label_const lr, ?\n"));
-
- tol->type = Lconstant | Labsolute | Loffset12;
- tol->at = CODEPC;
-
- op_load_offset(R0, CONSTPOOL_BASE, -128);
- debug(("load_label_const r0, ?\n"));
-
- op_mov(PC, R0);
-}
-
-#endif
define_insn(fake_call, fakecall_xCC)
{
Index: kaffe/config/bfin/jit-bfin.def
diff -u kaffe/config/bfin/jit-bfin.def:1.1 kaffe/config/bfin/jit-bfin.def:1.2
--- kaffe/config/bfin/jit-bfin.def:1.1 Thu Mar 23 19:26:12 2006
+++ kaffe/config/bfin/jit-bfin.def Sat Jan 19 15:13:38 2008
@@ -416,13 +416,6 @@
#define op_eor(T,F1,F2) op_rrr(CC_AL,ALU_EOR,SFT_LSLC,0,T,F1,F2)
#define op_eor_const(T,F1,I8) op_rrr(CC_AL,ALU_EOR | ALU_OP_IMMED,
SFT_LSLC, 0, T, F1, I8 & 0xff)
-#if 0
-/* defined differently below --- why? */
-#define op_ashr(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_ASR,(F2)<<1,T,0,F1)
-#define op_lshr(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_LSR,(F2)<<1,T,0,F1)
-#define op_lshl(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_LSL,(F2)<<1,T,0,F1)
-#endif
-
/*
*
* These use the register-specified shift forms.
@@ -1363,20 +1356,6 @@
debug(("cvt_double_int %d, %d\n", w, r));
}
-#if 0
-/* these aren't being used */
-define_insn(cvt_long_float, cvtlf_RxR)
-{
- /* Is a long a 64-bit quantity? */
- debug(("NOT IMPLEMENTED: cvt_long_float\n"));
-}
-
-define_insn(cvt_long_double, cvtld_RxR)
-{
- debug(("NOT IMPLEMENTED: cvt_long_double\n"));
- }
-#endif
-
define_insn(cvt_float_double, cvtfd_RxR)
{
int r = rreg_float(2);
@@ -1474,26 +1453,6 @@
debug(("branch type %d at 0x%x from 0x%x\n", bt, l -> at, l -> from));
}
-
-#if 0
-define_insn(call_ref, call_xCC)
-{
- label* l = const_label(1);
- assert(const_int(2) == ba);
-
- //
- // What's the point if it doesn't fit in a 24-bit
- // displacement?
- //
- assert((abs(CODEPC-ba) & 0x00ffffff) == 0 );
-
- l->type |= Llong26|Lrelative;
- l->at = CODEPC;
- l->from = CODEPC + 8;
-
- op_branch_linked(CC_AL, 0);
-}
-#endif
define_insn(call, call_xRC)
{
Index: kaffe/config/bfin/jit3-bfin.def
diff -u kaffe/config/bfin/jit3-bfin.def:1.1 kaffe/config/bfin/jit3-bfin.def:1.2
--- kaffe/config/bfin/jit3-bfin.def:1.1 Thu Mar 23 19:26:12 2006
+++ kaffe/config/bfin/jit3-bfin.def Sat Jan 19 15:13:38 2008
@@ -419,13 +419,6 @@
#define op_eor(T,F1,F2) op_rrr(CC_AL,ALU_EOR,SFT_LSLC,0,T,F1,F2)
#define op_eor_const(T,F1,I8) op_rrr(CC_AL,ALU_EOR | ALU_OP_IMMED,
SFT_LSLC, 0, T, F1, I8 & 0xff)
-#if 0
-/* defined differently below --- why? */
-#define op_ashr(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_ASR,(F2)<<1,T,0,F1)
-#define op_lshr(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_LSR,(F2)<<1,T,0,F1)
-#define op_lshl(T,F1,F2)
op_rrr(CC_AL,ALU_MOV,SFT_LSL,(F2)<<1,T,0,F1)
-#endif
-
/*
*
* These use the register-specified shift forms.
@@ -1486,20 +1479,6 @@
debug((DBOUT,"cvt_double_int %d, %d\n", w, r));
}
-#if 0
-/* these aren't being used */
-define_insn(cvt_long_float, cvtlf_RxR)
-{
- /* Is a long a 64-bit quantity? */
- debug((DBOUT,"NOT IMPLEMENTED: cvt_long_float\n"));
-}
-
-define_insn(cvt_long_double, cvtld_RxR)
-{
- debug((DBOUT,"NOT IMPLEMENTED: cvt_long_double\n"));
- }
-#endif
-
define_insn(cvt_float_double, cvtfd_RxR)
{
int r = rreg_float(2);
@@ -1882,35 +1861,6 @@
}
/* --------------------------------------------------------------------- */
-
-#if 0
-/*
- * We use to use this version of the fakecall system but it uses way
- * to many constant pool entries. Since it's not time critical we
- * use the new lower version which doesn't use the constant pool but
- * instead constructs the relevant addresses byte by byte.
- */
-define_insn(fake_call_constpool, fakecall_xCC)
-{
- label* tol = const_label(2);
- label* froml = const_label(1);
-
- froml->type = Lconstant | Labsolute | Loffset12;
- froml->at = CODEPC;
-
- op_load_offset(LR, CONSTPOOL_BASE, -128);
- debug((DBOUT,"load_label_const lr, ?\n"));
-
- tol->type = Lconstant | Labsolute | Loffset12;
- tol->at = CODEPC;
-
- op_load_offset(R0, CONSTPOOL_BASE, -128);
- debug((DBOUT,"load_label_const r0, ?\n"));
-
- op_mov(PC, R0);
-}
-
-#endif
define_insn(fake_call, fakecall_xCC)
{
Index: kaffe/config/i386/callKaffeException.h
diff -u kaffe/config/i386/callKaffeException.h:1.1
kaffe/config/i386/callKaffeException.h:1.2
--- kaffe/config/i386/callKaffeException.h:1.1 Tue Dec 23 17:26:32 2003
+++ kaffe/config/i386/callKaffeException.h Sat Jan 19 15:13:38 2008
@@ -24,10 +24,10 @@
static inline void callKaffeException(uintp fp,
uintp handler,
struct Hjava_lang_Throwable* eobj) {
- asm(" movl %2,%%eax \n"
- " movl %0,%%ebp \n"
- " jmp *%1 \n"
- : : "g" (fp), "r" (handler), "g" (eobj) : "eax");
+ __asm__(" movl %2,%%eax \n"
+ " movl %0,%%ebp \n"
+ " jmp *%1 \n"
+ : : "g" (fp), "r" (handler), "g" (eobj) : "eax");
}
#endif /* __i386_callKaffeException_h */
Index: kaffe/config/i386/common.h
diff -u kaffe/config/i386/common.h:1.22 kaffe/config/i386/common.h:1.23
--- kaffe/config/i386/common.h:1.22 Wed Aug 10 11:03:17 2005
+++ kaffe/config/i386/common.h Sat Jan 19 15:13:38 2008
@@ -38,7 +38,7 @@
* This is a macro to help GCC optimization.
* The rdtsc instruction load TSC to edx:eax aka A register. */
#define profiler_get_clicks(COUNTER) \
- asm volatile (".byte 0xf; .byte 0x31" /* "rdtsc" */ : "=A" (COUNTER))
+ __asm__ volatile (".byte 0xf; .byte 0x31" /* "rdtsc" */ : "=A"
(COUNTER))
#endif
*** Patch too long, truncated ***
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