Keith,
I'd like to request a minor change to the makefile rules to generate
targets. Could each rule start with removing the target.
Example:
%.o : %.c
$(CC) $(CFLAGS) -c -o $@ $<
becomes:
%.o : %.c
$(RM) $@
$(CC) $(CFLAGS) -c -o $@ $<
The main reason is to satisfy some configuration management systems
(Aegis in my case) where files in a changeset (a local sandbox for a
particular change) are sym-linked to *ALL* files in the repository
(including all objects and generated files). The reason for this is
that multiple users with multiple changesets do not have to recompile
files that have not changed as they refer to the existing objects,
libraries, executables and other generated files that are in the
repository. This can make development of large projects significantly
faster. The $(RM) command effectively removes the link and the
generated file will be created in the changeset directory until it
finally is integrated (committed/checked-in) to the repository.
Some dependency maintenance tools have a setting to force removal of
targets if it has to be remade. eg. cook has the "set unlink;"
directive but I haven't been able to find an equivalent for GNU Make.
If there is then this would be a better solution. ie. a one line change :)
At the moment I'm forcing Aegis to copy all files from the repository to
the changeset for two reasons.
1) kbuild-2.5 does not support source files that are symbolic links. I
tried hard-links but then I run into problem #2.
2) The
I know these are probably not high priorities for kbuild as most
developers use less restricting CM tools (cvs generally), but the
changes would not effect current users and would make it easier for
users of other CM systems. I could supply patches for the $(RM) option
if you don't object to these changes and would be likely to incorporate
them into future kbuild releases.
Thanks,
Brendan Simon.
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