https://bugs.kde.org/show_bug.cgi?id=389349
Jan-Marek Glogowski <glo...@fbihome.de> changed:
What |Removed |Added
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CC| |glo...@fbihome.de
--- Comment #1 from Jan-Marek Glogowski <glo...@fbihome.de> ---
So a colleague was bitten by the same instructions on Arch with ld:
https://lists.freedesktop.org/archives/libreoffice-qa/2018-August/010517.html
Some research found: https://github.com/aquynh/capstone/issues/1129
I'm just quoting the information:
Intel introduced new instructions for the protection of indirect branches,
which make the processor fault if the target of an indirect jump is not an
endbr{32,64} instruction. If the processor does not support Indirect Branch
Tracking (IBT), the instruction is a nop (see [0], pages 15ff. and 130f.)
The instruction bytes for endbr64 are f3 0f 1e fa, for endbr32 they are f3 0f
1e fb.
So I guess there will be more of these in the future.
[0]
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
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