https://bugs.kde.org/show_bug.cgi?id=417187

--- Comment #8 from Stefan Maksimovic <stefan.maksimo...@rt-rk.com> ---
(In reply to Stefan Maksimovic from comment #7)
> Thank you for your reply, Julian.
> 
> We pretty much agree with your analysis of the initial SB sequence as well as
> the first and second speculative disassembly.
> 
> A note for the first speculative disassembly: you guessed correctly,
> the branch at 0x4013C0 does jump back to 0x4013BC.
> 
> To be a bit more clear, the 16 bit offset of the bne instruction (0xFFFE
> signed, in this case) is left shifted 2 bits and added to the address
> following the branch, forming the target address of the jump.

Quoting the instruction set reference, as I may have provided erroneous
information about the bne instruction above:

"An 18-bit signed offset (the 16-bit offset field shifted left 2 bits) is added
to the address of the instruction following
the branch (not the branch itself), in the branch delay slot, to form a
PC-relative effective target address."

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