https://bugs.kde.org/show_bug.cgi?id=440332
Bug ID: 440332
Summary: arm64: Correct memory barrier position for 8.1-A LSE
instructions
Product: valgrind
Version: unspecified
Platform: Other
OS: Linux
Status: REPORTED
Severity: normal
Priority: NOR
Component: vex
Assignee: jsew...@acm.org
Reporter: ppa...@dagobah.cz
Target Milestone: ---
Created attachment 140356
--> https://bugs.kde.org/attachment.cgi?id=140356&action=edit
arm64: Correct memory barrier position for 8.1-A LSE instructions
Fix guest-to-IR decoding of the Armv8.1-A LSE instructions LD<x>{,A}{,L},
CAS{,A}{,L} and CASP{,A}{,L} which have the memory barrier statement placed at
an incorrect position. For acquire semantics, place the barrier after the IR of
the decoded operation. For release semantics, place the barrier before it.
Note that decoding of the Armv8.0-A instructions LDAXR, STLXR, LDAR and STLR
places the memory barrier statement at the correct position.
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