https://bugs.kde.org/show_bug.cgi?id=369459
--- Comment #4 from Andrew Pinski <pins...@gcc.gnu.org> --- (In reply to Julian Seward from comment #3) > Andrew, do you know which implementation this is? eg is it a Cortex > A-something, > or something else? It is a custom ARMv8-a core produced by Cavium. It is not a cortex-a based at all. We had a similar issues with Oracle JDK but we worked with Oracle to fix it; that was a year or so ago. As mentioned we have a similar issue with the MIPS64 implementation of valgrind with our (Cavium's) MIPS64r3 core (Octeon 3). I suspect this is going to need a fundamental change in valgrind to fix both of these issues. One idea I have is to pattern match on the ldxr/stxr sequence and produce a single instruction in the IR -- You are receiving this mail because: You are watching all bug changes.
