** Description changed:

  [Impact]
- A ~12% performance gain can be achieved with the iperf benchmark by allowing 
the ixgbe driver to take advantage of PCIe Relaxed Ordering, as observed on the 
HiSilicon D05 system.
+ A signficant performance gain can be achieved with the iperf benchmark by 
allowing the ixgbe driver to take advantage of PCIe Relaxed Ordering, as 
observed on the HiSilicon D05 system.
  
  [Test Case]
- iperf command TBD
+ = server =
+ taskset -c 0-15 iperf -s -B 192.168.80.11
+ taskset -c 16-31 iperf -s -B 192.168.90.11
+ 
+ = client =
+ taskset -c 0-15 iperf -c 192.168.80.11 -i 3 -t 600 -P 8 &
+ taskset -c 16-31 iperf -c 192.168.90.11 -i 3 -t 600 -P 8 &
+ 
+ Without these patches, we observe an aggregate performance of 8.54
+ Gbit/sec. With these patches, we observe an aggregate performance of
+ 18.82 Gbit/sec.
+ 
  
  [Regression Risk]
- The patchset is careful to only enable Relaxed Ordering if advertised up 
through the root port. However, it is possible that enabling RO on hardware 
that supports it could actually regress performance, or that there is hw out 
there that advertises RO, but has bugs in the implementation. The patch series 
includes quirks for HW where RO is advertised but known to have issues[*] - but 
this list maybe incomplete. This would only impact devices w/ drivers that take 
advantage of RO - currently cxgb4 and (not yet upstream) ixgbe.
+ The following risk assessment applies to both artful and zesty - but note 
that the bulk of these changes are *already in artful*. The proposed SRU for 
artful would just allow an additional driver to take advantage of it. For 
zesty, an SRU would need to both introduce this feature and enable it for both 
the cxgb4 and ixgbe drivers.
+ 
+ The patchset is careful to only enable Relaxed Ordering if advertised up
+ through the root port. However, it is possible that enabling RO on
+ hardware that supports it could actually regress performance, or that
+ there is hw out there that advertises RO, but has bugs in the
+ implementation. The patch series includes quirks for HW where RO is
+ advertised but known to have issues[*] - but this list maybe incomplete.
+ This would only impact devices w/ drivers that take advantage of RO -
+ currently cxgb4 and (not yet upstream) ixgbe.
  
  Also, there is a possibility of a crash caused by a coding error. One
  such issue has already been found and fixed upstream [**], and is part
  of this series.
  
  The risk of both of these regressions is reduced by the fact that this
  code is now in an upstream release (v4.13) and has therefore gotten a
  lot more testing that has not resulted in regressions reports.
  
- 
  [*]
  commit 077fa19c5dfa06a6ae04fb1661680940ff837612
  Author: dingtianhong <dingtianh...@huawei.com>
  Date:   Tue Aug 15 11:23:25 2017 +0800
  
-     PCI: Disable Relaxed Ordering Attributes for AMD A110
+     PCI: Disable Relaxed Ordering Attributes for AMD A110
  commit 87e09cdec4dae08acdb4aa49beb793c19d73e73e
  Author: dingtianhong <dingtianh...@huawei.com>
  Date:   Tue Aug 15 11:23:24 2017 +0800
  
-     PCI: Disable Relaxed Ordering for some Intel processors
+     PCI: Disable Relaxed Ordering for some Intel processors
  
  [**]
  commit 0e405232871d67bf1b238d56b6b3d500e69ebbf3
  Author: dingtianhong <dingtianh...@huawei.com>
  Date:   Tue Aug 15 23:24:48 2017 +0800
  
-     PCI: fix oops when try to find Root Port for a PCI device
+     PCI: fix oops when try to find Root Port for a PCI device

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https://bugs.launchpad.net/bugs/1721365

Title:
  PCIe: Allow drivers to use Relaxed Ordering on capable root ports

Status in linux package in Ubuntu:
  Fix Released
Status in linux source package in Zesty:
  Confirmed

Bug description:
  [Impact]
  A signficant performance gain can be achieved with the iperf benchmark by 
allowing the ixgbe driver to take advantage of PCIe Relaxed Ordering, as 
observed on the HiSilicon D05 system.

  [Test Case]
  = server =
  taskset -c 0-15 iperf -s -B 192.168.80.11
  taskset -c 16-31 iperf -s -B 192.168.90.11

  = client =
  taskset -c 0-15 iperf -c 192.168.80.11 -i 3 -t 600 -P 8 &
  taskset -c 16-31 iperf -c 192.168.90.11 -i 3 -t 600 -P 8 &

  Without these patches, we observe an aggregate performance of 8.54
  Gbit/sec. With these patches, we observe an aggregate performance of
  18.82 Gbit/sec.

  
  [Regression Risk]
  The following risk assessment applies to both artful and zesty - but note 
that the bulk of these changes are *already in artful*. The proposed SRU for 
artful would just allow an additional driver to take advantage of it. For 
zesty, an SRU would need to both introduce this feature and enable it for both 
the cxgb4 and ixgbe drivers.

  The patchset is careful to only enable Relaxed Ordering if advertised
  up through the root port. However, it is possible that enabling RO on
  hardware that supports it could actually regress performance, or that
  there is hw out there that advertises RO, but has bugs in the
  implementation. The patch series includes quirks for HW where RO is
  advertised but known to have issues[*] - but this list maybe
  incomplete. This would only impact devices w/ drivers that take
  advantage of RO - currently cxgb4 and (not yet upstream) ixgbe.

  Also, there is a possibility of a crash caused by a coding error. One
  such issue has already been found and fixed upstream [**], and is part
  of this series.

  The risk of both of these regressions is reduced by the fact that this
  code is now in an upstream release (v4.13) and has therefore gotten a
  lot more testing that has not resulted in regressions reports.

  [*]
  commit 077fa19c5dfa06a6ae04fb1661680940ff837612
  Author: dingtianhong <dingtianh...@huawei.com>
  Date:   Tue Aug 15 11:23:25 2017 +0800

      PCI: Disable Relaxed Ordering Attributes for AMD A110
  commit 87e09cdec4dae08acdb4aa49beb793c19d73e73e
  Author: dingtianhong <dingtianh...@huawei.com>
  Date:   Tue Aug 15 11:23:24 2017 +0800

      PCI: Disable Relaxed Ordering for some Intel processors

  [**]
  commit 0e405232871d67bf1b238d56b6b3d500e69ebbf3
  Author: dingtianhong <dingtianh...@huawei.com>
  Date:   Tue Aug 15 23:24:48 2017 +0800

      PCI: fix oops when try to find Root Port for a PCI device

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