Hi all,
my inquiry concerns the "Building the Fedora Kernel" article (See
https://fedoramagazine.org/building-fedora-kernel/, "Building the Fedora Kernel
by Laura Abbot, 09/06/2019 stating that "Two common reasons to rebuild the
kernel are to . . . add patches"; Also See
https://docs.pagure.org/docs-fedora/building-custom-kernel.html).
Specifically, I would like to apply the below-listed PATCH to kernel
5.2.18-200.fc30.x86_64 to patch to resolve a Header Error Code 127 error
received when attempting GPU pass-through on a 2700X Taichi Ultimate (
PATCH: https://clbin.com/VCiYJ, patch code listed at the end).
I am running the following Build:
Motherboard: ASRock, X470 Taichi Ultimate
BIOS Version: BIOS 3.3P
CPU: AMD Ryzen 7 2700X
HDDs:
Host Linux: Samsung Electronics NVMe SSD Controller SM961/PM961,
Windows(7/10) VMSamsung SSD 860
GPUs:
Host Linux: PNY nVidia Quadro M2000,
VM Pass-through: EVGA nVidia GeForce GTX 760; Linux: Fedora 30
Kernel: 5.2.18-200.fc30.x86_64).
I have been through several materials including
(https://unix.stackexchange.com/questions/475128/is-there-a-quick-way-to-install-earlier-fedora-kernel-packages/475134
describing how to get a particular build using koji;
https://docs.fedoraproject.org/en-US/quick-docs/kernel/build-custom-kernel/
describing how to build the kernel via fedpkg and git;
https://docs.fedoraproject.org/en-US/fedora/rawhide/system-administrators-guide/kernel-module-driver-configuration/Manually_Upgrading_the_Kernel/
directed to upgrading the kernel;
https://fedoraproject.org/wiki/Building_a_custom_kernel/Source_RPM describing
how to build the kernel from RPMS using rpmdev-setuptree and koji;
https://fedoraproject.org/wiki/Building_a_custom_kernel#Dependencies_for_building_kernels
describing how to building the kernel via fedpkg and git;
https://fedoramagazine.org/building-fedora-kernel/ describing how to build the
kernel and listing two main reasons for doing so;
https://docs.pagure.org/docs-fedora/building-
custom-kernel.html crediting "Building the Fedora Kernel";
https://fedoramagazine.org/install-kernel-koji/ describing how to install a
kernel from koji;
https://github.com/AcidzDev/CentOS-header127/blob/master/CentOS-127patch.sh
listing patch -p1 < pci.patch as the way to apply a patch to a kernel
downloaded via wget from wget
https://cdn.kernel.org/pub/linux/kernel/v5.x/linux-5.3.1.tar.xz). I have also
inquired at level1techs
https://forum.level1techs.com/t/windows-10vm-gpu-passthrough-pci-header-error-nr-127/144480/24
and the Fedora Forum
https://forums.fedoraforum.org/showthread.php?322470-F30-how-to-apply-PATCH-to-resolve-GPU-PASSTHROUGH-Header-Error-Code-127.
At this point am somewhat overwhelemed with information and am unable to figure
out how to properly apply this patch kernel 5.2.18-200.fc30.x86_64.
When attempting to compile and patch using koji (instructions at
https://fedoraproject.org/wiki/Build...nel/Source_RPM), I am not sure how to
apply the patch because there is only the kernel.spec and source which does not
have any .c or .h files. Editing the kernel.spec file and copying the patch to
~/rpmbuild/SOURCES makes the build process fail. So I am kinda stuck here.
On the other hand, going the git and fedpkg route
(https://docs.fedoraproject.org/en-US...custom-kernel/,
https://fedoramagazine.org/building-fedora-kernel/;
https://docs.pagure.org/docs-fedora/...om-kernel.html), I am not able to
download a specific kernel version and always get a 5.3 kernel instead of the
5.2.18-200 that I am currently running. In fact, I tried it again yesterday
and received the kernel-5.4.0-0.rc2.git2.1.fc30.x86_64.rpm.
It seems that the above-listed two ways are just two similar approaches to
accomplishing the same task. Either way, I just cannot get the result I am
looking for: a patched 5.2.18-200.fc30.x86_64 kernel with the ability to
install NVIDIA drivers, do GPU pass-through and update later via "dnf update"
I must be missing something and any help is welcome.
The PATCH code is below
PATCH: https://clbin.com/VCiYJ (patche code listed at the end)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 766f5779db92..dc19079dad1b 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -52,6 +52,9 @@ unsigned int pci_pm_d3_delay;
static void pci_pme_list_scan(struct work_struct *work);
+static void pci_dev_save_and_disable(struct pci_dev *dev);
+static void pci_dev_restore(struct pci_dev *dev);
+
static LIST_HEAD(pci_pme_list);
static DEFINE_MUTEX(pci_pme_list_mutex);
static DECLARE_DELAYED_WORK(pci_pme_work, pci_pme_list_scan);
@@ -1379,15 +1382,7 @@ static void pci_restore_config_space(struct pci_dev
*pdev)
pci_restore_config_space_range(pdev, 4, 9, 10, false);
pci_restore_config_space_range(pdev, 0, 3, 0, false);
} else if (pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
- pci_restore_config_space_range(pdev, 12, 15, 0, false);
-
- /*
- * Force rewriting of prefetch registers to avoid S3 resume
- * issues on Intel PCI bridges that occur when these
- * registers are not explicitly written.
- */
- pci_restore_config_space_range(pdev, 9, 11, 0, true);
- pci_restore_config_space_range(pdev, 0, 8, 0, false);
+ pci_restore_config_space_range(pdev, 0, 15, 0, true);
} else {
pci_restore_config_space_range(pdev, 0, 15, 0, false);
}
@@ -4636,6 +4631,8 @@ void pci_reset_secondary_bus(struct pci_dev *dev)
{
u16 ctrl;
+ pci_dev_save_and_disable(dev);
+
pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &ctrl);
ctrl |= PCI_BRIDGE_CTL_BUS_RESET;
pci_write_config_word(dev, PCI_BRIDGE_CONTROL, ctrl);
@@ -4649,6 +4646,8 @@ void pci_reset_secondary_bus(struct pci_dev *dev)
ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
pci_write_config_word(dev, PCI_BRIDGE_CONTROL, ctrl);
+ pci_dev_restore(dev);
+
/*
* Trhfa for conventional PCI is 2^25 clock cycles.
* Assuming a minimum 33MHz clock this results in a 1s
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