Thanks for your reply! I should have read more carefully... Besides, do you know where can I find the specific rules of LKMM? Now it seems that two irrelevant READ_ONCE()s can execute out of order, what about two WRITE_ONCE()? or a READ_ONCE() followed by a WRITE_ONCE()? etc... Intel gave several examples in it's manual (Volume 3, 8.2.3). Does LKMM provide similar examples?
FMDF <[email protected]> 于2021年10月25日周一 下午7:33写道： > On Mon, Oct 25, 2021 at 10:33 AM Zhang Zeren <[email protected]> wrote: > > > > Hi, I read an example in the Documentation/memory-barriers.txt, which > says > >> > >> (*) On any given CPU, dependent memory accesses will be issued in > order, with > >> respect to itself. This means that for: > > "dependent" _is_ the key to understanding this topic. As Valentin > Vidić wrote, your loads are _not_ dependent and / or related in any > way. > > > As far as I understand it, linux kernel memory model (LKMM) guarantee > two read operations > > execute in order. And if the CPU architecture offer an looser memory > ordering (like Alpha), then > > the compiler must help to add a memory barrier after the load > instruction to fufill the LKMM's > > standard. > > No, adding a memory barrier is not a compiler job, instead it is up to > the kernel code. > For instance, please take a look at the implementation of > __READ_ONCE() for Alpha in arch/alpha/include/asm/rwonce.h (note that > __READ_ONCE() is used by READ_ONCE()). > > Regards, > > Fabio M. De Francesco >
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