Hi Mulyadi, On Fri, Feb 29, 2008 at 3:21 PM, Jike Song <[EMAIL PROTECTED]> wrote: > On Thu, Feb 7, 2008 at 11:50 PM, Mulyadi Santosa > <[EMAIL PROTECTED]> wrote: > > Hi.... > > > > AFAIK at the time it's in disabled state...yes it will be missed. But > > once you enabled it again.... missing interrupts will be received. > > Do you mean that the PIC(Local APIC or something else) will retain the > disabled interrupt, and deliver it once again to the processor core as > soon as be re-enabled? >
This is something new to me. After some some search, Mulyadi is right. It is called "Interrupt Request Buffering". And according to Unabridged Pentium 4 (pg 1537) while processing one interrupt, it can receive another interrupt, but the 3rd one that comes in will be discarded, and it is all on the same interrupt vector. Thanks for the sharing everyone.... > Regards, > Jike -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to [EMAIL PROTECTED] Please read the FAQ at http://kernelnewbies.org/FAQ
