Hi!
On 09:36 Fri 14 Nov , Peter Teoh wrote:
> Perhaps Michael meant:
>
> cat /proc/mtrr
Yes exactly!
> reg00: base=0x000000000 ( 0MB), size= 2048MB, count=1: write-back
> reg01: base=0x080000000 ( 2048MB), size= 512MB, count=1: write-back
> reg02: base=0x0a0000000 ( 2560MB), size= 256MB, count=1: write-back
> reg03: base=0x0b0000000 ( 2816MB), size= 128MB, count=1: write-back
> reg04: base=0x0b8000000 ( 2944MB), size= 64MB, count=1: write-back
> reg05: base=0x0fbc00000 ( 4028MB), size= 2MB, count=1: write-combining
> reg06: base=0x0fb800000 ( 4024MB), size= 4MB, count=1: write-combining
> reg07: base=0x0fb000000 ( 4016MB), size= 8MB, count=1: write-combining
>
> Please give some hint on how to read these info? Thanks!!!
These are the mapped memory regions. One of them is your main memory. The
other regions are mostly (all?) memory mapped IO. Usually one of them is
your graphics adapter.
write-back = reads+writes are cached by the cpu (L1/L2) cache, writes may be
done at any time and may be reordered; this is the case for system memory
write-combining = reads are not cached, writes are cached by a special
in cpu write-combining cache, which is seperate to the L1/L2 cache and which
ensures that writes are not reordered; sometimes multiple writes can be
combined to one, e.g. if you write sequencially
There are some more caching behaviors. You can find them at developer.amd.com
in "system programming manual".
-Michi
--
programing a layer 3+4 network protocol for mesh networks
see http://michaelblizek.twilightparadox.com
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