On Mon, 05 Apr 2021 01:57:08 PDT (-0700), m...@ics.forth.gr wrote:
Add RISC-V to the list of supported kexec architecturs, we need to
add the definition early-on so that later patches can use it.
EM_RISCV is 243 as per ELF psABI specification here:
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
Signed-off-by: Nick Kossifidis <m...@ics.forth.gr>
---
include/uapi/linux/kexec.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/kexec.h b/include/uapi/linux/kexec.h
index 05669c87a..778dc191c 100644
--- a/include/uapi/linux/kexec.h
+++ b/include/uapi/linux/kexec.h
@@ -42,6 +42,7 @@
#define KEXEC_ARCH_MIPS_LE (10 << 16)
#define KEXEC_ARCH_MIPS ( 8 << 16)
#define KEXEC_ARCH_AARCH64 (183 << 16)
+#define KEXEC_ARCH_RISCV (243 << 16)
/* The artificial cap on the number of segments passed to kexec_load. */
#define KEXEC_SEGMENT_MAX 16
This is missing the kexec maintainers, who I've added. I'm happy to
just take this along with the rest of the patch set, as that's probably
easiest. I usually like to get an Ack on this sort of thing, but I'm
just going to speculate that this isn't controversial and put this on
riscv/for-next. LMK if you want me to do something more complicated
like a shared tag, but I see the arm64 stuff went in via the arm64 tree
so I'm assuming this is fine.
Thanks!
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