I'm slightly lacking in overall details here, but the short version is
that on MIPS64 we aren't properly saving/restoring FPU registers.
--- linux-2.6.14/arch/mips/kernel/kgdb_handler.S
+++ linux-2.6.14/arch/mips/kernel/kgdb_handler.S
@@ -17,15 +17,17 @@
#define DMFC0 mfc0
#define DMTC0 mtc0
#define LDC1 lwc1
-#define SDC1 lwc1
+#define SDC1 swc1
#endif
#ifdef CONFIG_64BIT
#define DMFC0 dmfc0
#define DMTC0 dmtc0
#define LDC1 ldc1
-#define SDC1 ldc1
+#define SDC1 sdc1
#endif
+#include <asm/asmmacro.h>
+
/*
* [jsun] We reserves about 2x GDB_FR_SIZE in stack. The lower (addressed)
* part is used to store registers and passed to exception handler.
@@ -143,56 +145,21 @@
srl v0, v0, 16
andi v0, v0, (ST0_CU1 >> 16)
- beqz v0,2f /* disabled, skip */
+ beqz v0,3f /* disabled, skip */
nop
- SDC1 $0, GDB_FR_FPR0(sp)
- SDC1 $1, GDB_FR_FPR1(sp)
- SDC1 $2, GDB_FR_FPR2(sp)
- SDC1 $3, GDB_FR_FPR3(sp)
- SDC1 $4, GDB_FR_FPR4(sp)
- SDC1 $5, GDB_FR_FPR5(sp)
- SDC1 $6, GDB_FR_FPR6(sp)
- SDC1 $7, GDB_FR_FPR7(sp)
- SDC1 $8, GDB_FR_FPR8(sp)
- SDC1 $9, GDB_FR_FPR9(sp)
- SDC1 $10, GDB_FR_FPR10(sp)
- SDC1 $11, GDB_FR_FPR11(sp)
- SDC1 $12, GDB_FR_FPR12(sp)
- SDC1 $13, GDB_FR_FPR13(sp)
- SDC1 $14, GDB_FR_FPR14(sp)
- SDC1 $15, GDB_FR_FPR15(sp)
- SDC1 $16, GDB_FR_FPR16(sp)
- SDC1 $17, GDB_FR_FPR17(sp)
- SDC1 $18, GDB_FR_FPR18(sp)
- SDC1 $19, GDB_FR_FPR19(sp)
- SDC1 $20, GDB_FR_FPR20(sp)
- SDC1 $21, GDB_FR_FPR21(sp)
- SDC1 $22, GDB_FR_FPR22(sp)
- SDC1 $23, GDB_FR_FPR23(sp)
- SDC1 $24, GDB_FR_FPR24(sp)
- SDC1 $25, GDB_FR_FPR25(sp)
- SDC1 $26, GDB_FR_FPR26(sp)
- SDC1 $27, GDB_FR_FPR27(sp)
- SDC1 $28, GDB_FR_FPR28(sp)
- SDC1 $29, GDB_FR_FPR29(sp)
- SDC1 $30, GDB_FR_FPR30(sp)
- SDC1 $31, GDB_FR_FPR31(sp)
-
-/*
- * FPU control registers
- */
-
- cfc1 v0, CP1_STATUS
- LONG_S v0, GDB_FR_FSR(sp)
- cfc1 v0, CP1_REVISION
- LONG_S v0, GDB_FR_FIR(sp)
+ li t0, 0
+#ifdef CONFIG_64BIT
+ mfc0 t0, CP0_STATUS
+#endif
+ fpu_save_double_kgdb sp t0 t1 # clobbers t1
+
/*
* Current stack frame ptr
*/
-2:
+3:
LONG_S sp, GDB_FR_FRP(sp)
/*
@@ -261,38 +228,12 @@
beqz v0, 3f /* disabled, skip */
nop
- LDC1 $31, GDB_FR_FPR31(sp)
- LDC1 $30, GDB_FR_FPR30(sp)
- LDC1 $29, GDB_FR_FPR29(sp)
- LDC1 $28, GDB_FR_FPR28(sp)
- LDC1 $27, GDB_FR_FPR27(sp)
- LDC1 $26, GDB_FR_FPR26(sp)
- LDC1 $25, GDB_FR_FPR25(sp)
- LDC1 $24, GDB_FR_FPR24(sp)
- LDC1 $23, GDB_FR_FPR23(sp)
- LDC1 $22, GDB_FR_FPR22(sp)
- LDC1 $21, GDB_FR_FPR21(sp)
- LDC1 $20, GDB_FR_FPR20(sp)
- LDC1 $19, GDB_FR_FPR19(sp)
- LDC1 $18, GDB_FR_FPR18(sp)
- LDC1 $17, GDB_FR_FPR17(sp)
- LDC1 $16, GDB_FR_FPR16(sp)
- LDC1 $15, GDB_FR_FPR15(sp)
- LDC1 $14, GDB_FR_FPR14(sp)
- LDC1 $13, GDB_FR_FPR13(sp)
- LDC1 $12, GDB_FR_FPR12(sp)
- LDC1 $11, GDB_FR_FPR11(sp)
- LDC1 $10, GDB_FR_FPR10(sp)
- LDC1 $9, GDB_FR_FPR9(sp)
- LDC1 $8, GDB_FR_FPR8(sp)
- LDC1 $7, GDB_FR_FPR7(sp)
- LDC1 $6, GDB_FR_FPR6(sp)
- LDC1 $5, GDB_FR_FPR5(sp)
- LDC1 $4, GDB_FR_FPR4(sp)
- LDC1 $3, GDB_FR_FPR3(sp)
- LDC1 $2, GDB_FR_FPR2(sp)
- LDC1 $1, GDB_FR_FPR1(sp)
- LDC1 $0, GDB_FR_FPR0(sp)
+ li t0, 0
+#ifdef CONFIG_64BIT
+ mfc0 t0, CP0_STATUS
+#endif
+ fpu_restore_double_kgdb sp t0 t1 # clobbers t1
+
/*
* Now the CP0 and integer registers
--- linux-2.6.14/include/asm-mips/asmmacro-32.h.orig 2006-04-25
17:45:47.581371520 -0700
+++ linux-2.6.14/include/asm-mips/asmmacro-32.h 2006-04-25 22:48:11.601061264
-0700
@@ -12,6 +12,27 @@
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
+ .macro fpu_save_double_kgdb stack status tmp1=t0
+ cfc1 \tmp1, fcr31
+ sdc1 $f0, GDB_FR_FPR0(\stack)
+ sdc1 $f2, GDB_FR_FPR2(\stack)
+ sdc1 $f4, GDB_FR_FPR4(\stack)
+ sdc1 $f6, GDB_FR_FPR6(\stack)
+ sdc1 $f8, GDB_FR_FPR8(\stack)
+ sdc1 $f10, GDB_FR_FPR10(\stack)
+ sdc1 $f12, GDB_FR_FPR12(\stack)
+ sdc1 $f14, GDB_FR_FPR14(\stack)
+ sdc1 $f16, GDB_FR_FPR16(\stack)
+ sdc1 $f18, GDB_FR_FPR18(\stack)
+ sdc1 $f20, GDB_FR_FPR20(\stack)
+ sdc1 $f22, GDB_FR_FPR22(\stack)
+ sdc1 $f24, GDB_FR_FPR24(\stack)
+ sdc1 $f26, GDB_FR_FPR26(\stack)
+ sdc1 $f28, GDB_FR_FPR28(\stack)
+ sdc1 $f30, GDB_FR_FPR30(\stack)
+ sw \tmp1, GDB_FR_FSR(\stack)
+ .endm
+
.macro fpu_save_double thread status tmp1=t0
cfc1 \tmp1, fcr31
sdc1 $f0, THREAD_FPR0(\thread)
@@ -91,6 +112,27 @@
ctc1 \tmp, fcr31
.endm
+ .macro fpu_restore_double_kgdb stack status tmp=t0
+ lw \tmp, GDB_FR_FSR(\stack)
+ ldc1 $f0, GDB_FR_FPR0(\stack)
+ ldc1 $f2, GDB_FR_FPR2(\stack)
+ ldc1 $f4, GDB_FR_FPR4(\stack)
+ ldc1 $f6, GDB_FR_FPR6(\stack)
+ ldc1 $f8, GDB_FR_FPR8(\stack)
+ ldc1 $f10, GDB_FR_FPR10(\stack)
+ ldc1 $f12, GDB_FR_FPR12(\stack)
+ ldc1 $f14, GDB_FR_FPR14(\stack)
+ ldc1 $f16, GDB_FR_FPR16(\stack)
+ ldc1 $f18, GDB_FR_FPR18(\stack)
+ ldc1 $f20, GDB_FR_FPR20(\stack)
+ ldc1 $f22, GDB_FR_FPR22(\stack)
+ ldc1 $f24, GDB_FR_FPR24(\stack)
+ ldc1 $f26, GDB_FR_FPR26(\stack)
+ ldc1 $f28, GDB_FR_FPR28(\stack)
+ ldc1 $f30, GDB_FR_FPR30(\stack)
+ ctc1 \tmp, fcr31
+ .endm
+
.macro fpu_restore_single thread tmp=t0
lw \tmp, THREAD_FCR31(\thread)
lwc1 $f0, THREAD_FPR0(\thread)
--- linux-2.6.14/include/asm-mips/asmmacro-64.h.orig 2006-04-25
17:45:55.904106272 -0700
+++ linux-2.6.14/include/asm-mips/asmmacro-64.h 2006-04-25 22:50:04.555889520
-0700
@@ -53,6 +53,46 @@
sdc1 $f31, THREAD_FPR31(\thread)
.endm
+ .macro fpu_save_16odd_kgdb stack
+ sdc1 $f1, GDB_FR_FPR1(\stack)
+ sdc1 $f3, GDB_FR_FPR3(\stack)
+ sdc1 $f5, GDB_FR_FPR5(\stack)
+ sdc1 $f7, GDB_FR_FPR7(\stack)
+ sdc1 $f9, GDB_FR_FPR9(\stack)
+ sdc1 $f11, GDB_FR_FPR11(\stack)
+ sdc1 $f13, GDB_FR_FPR13(\stack)
+ sdc1 $f15, GDB_FR_FPR15(\stack)
+ sdc1 $f17, GDB_FR_FPR17(\stack)
+ sdc1 $f19, GDB_FR_FPR19(\stack)
+ sdc1 $f21, GDB_FR_FPR21(\stack)
+ sdc1 $f23, GDB_FR_FPR23(\stack)
+ sdc1 $f25, GDB_FR_FPR25(\stack)
+ sdc1 $f27, GDB_FR_FPR27(\stack)
+ sdc1 $f29, GDB_FR_FPR29(\stack)
+ sdc1 $f31, GDB_FR_FPR31(\stack)
+ .endm
+
+ .macro fpu_save_16even_kgdb stack tmp=t0
+ cfc1 \tmp, fcr31
+ sdc1 $f0, GDB_FR_FPR0(\stack)
+ sdc1 $f2, GDB_FR_FPR2(\stack)
+ sdc1 $f4, GDB_FR_FPR4(\stack)
+ sdc1 $f6, GDB_FR_FPR6(\stack)
+ sdc1 $f8, GDB_FR_FPR8(\stack)
+ sdc1 $f10, GDB_FR_FPR10(\stack)
+ sdc1 $f12, GDB_FR_FPR12(\stack)
+ sdc1 $f14, GDB_FR_FPR14(\stack)
+ sdc1 $f16, GDB_FR_FPR16(\stack)
+ sdc1 $f18, GDB_FR_FPR18(\stack)
+ sdc1 $f20, GDB_FR_FPR20(\stack)
+ sdc1 $f22, GDB_FR_FPR22(\stack)
+ sdc1 $f24, GDB_FR_FPR24(\stack)
+ sdc1 $f26, GDB_FR_FPR26(\stack)
+ sdc1 $f28, GDB_FR_FPR28(\stack)
+ sdc1 $f30, GDB_FR_FPR30(\stack)
+ sw \tmp, GDB_FR_FSR(\stack)
+ .endm
+
.macro fpu_save_double thread status tmp
sll \tmp, \status, 5
bgez \tmp, 2f
@@ -61,6 +101,15 @@
fpu_save_16even \thread \tmp
.endm
+ .macro fpu_save_double_kgdb stack status tmp
+ sll \tmp, \status, 5
+ bgez \tmp, 2f
+ nop
+ fpu_save_16odd_kgdb \stack
+2:
+ fpu_save_16even_kgdb \stack \tmp
+ .endm
+
.macro fpu_restore_16even thread tmp=t0
lw \tmp, THREAD_FCR31(\thread)
ldc1 $f0, THREAD_FPR0(\thread)
@@ -101,6 +150,46 @@
ldc1 $f31, THREAD_FPR31(\thread)
.endm
+ .macro fpu_restore_16even_kgdb stack tmp=t0
+ lw \tmp, GDB_FR_FSR(\stack)
+ ldc1 $f0, GDB_FR_FPR0(\stack)
+ ldc1 $f2, GDB_FR_FPR2(\stack)
+ ldc1 $f4, GDB_FR_FPR4(\stack)
+ ldc1 $f6, GDB_FR_FPR6(\stack)
+ ldc1 $f8, GDB_FR_FPR8(\stack)
+ ldc1 $f10, GDB_FR_FPR10(\stack)
+ ldc1 $f12, GDB_FR_FPR12(\stack)
+ ldc1 $f14, GDB_FR_FPR14(\stack)
+ ldc1 $f16, GDB_FR_FPR16(\stack)
+ ldc1 $f18, GDB_FR_FPR18(\stack)
+ ldc1 $f20, GDB_FR_FPR20(\stack)
+ ldc1 $f22, GDB_FR_FPR22(\stack)
+ ldc1 $f24, GDB_FR_FPR24(\stack)
+ ldc1 $f26, GDB_FR_FPR26(\stack)
+ ldc1 $f28, GDB_FR_FPR28(\stack)
+ ldc1 $f30, GDB_FR_FPR30(\stack)
+ ctc1 \tmp, fcr31
+ .endm
+
+ .macro fpu_restore_16odd_kgdb stack
+ ldc1 $f1, GDB_FR_FPR1(\stack)
+ ldc1 $f3, GDB_FR_FPR3(\stack)
+ ldc1 $f5, GDB_FR_FPR5(\stack)
+ ldc1 $f7, GDB_FR_FPR7(\stack)
+ ldc1 $f9, GDB_FR_FPR9(\stack)
+ ldc1 $f11, GDB_FR_FPR11(\stack)
+ ldc1 $f13, GDB_FR_FPR13(\stack)
+ ldc1 $f15, GDB_FR_FPR15(\stack)
+ ldc1 $f17, GDB_FR_FPR17(\stack)
+ ldc1 $f19, GDB_FR_FPR19(\stack)
+ ldc1 $f21, GDB_FR_FPR21(\stack)
+ ldc1 $f23, GDB_FR_FPR23(\stack)
+ ldc1 $f25, GDB_FR_FPR25(\stack)
+ ldc1 $f27, GDB_FR_FPR27(\stack)
+ ldc1 $f29, GDB_FR_FPR29(\stack)
+ ldc1 $f31, GDB_FR_FPR31(\stack)
+ .endm
+
.macro fpu_restore_double thread status tmp
sll \tmp, \status, 5
bgez \tmp, 1f # 16 register mode?
@@ -109,6 +198,15 @@
1: fpu_restore_16even \thread \tmp
.endm
+ .macro fpu_restore_double_kgdb stack status tmp
+ sll \tmp, \status, 5
+ bgez \tmp, 1f # 16 register mode?
+ nop
+
+ fpu_restore_16odd_kgdb \stack
+1: fpu_restore_16even_kgdb \stack \tmp
+ .endm
+
.macro cpu_save_nonscratch thread
LONG_S s0, THREAD_REG16(\thread)
LONG_S s1, THREAD_REG17(\thread)
--
Tom Rini
http://gate.crashing.org/~trini/
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