I have nets that have different clearance requirements depending on
where they are. There are two situations that are in my designs:
1) Technical/Manufacturing limitations: Trace and space limitations
depend on layer copper thickness and whether it's an inner layer or
outer layer. For instance, my current project has 0.1mm trace and space
and a 15um thick copper layer on one pair of inner layers. Outer layers
are 30um and use 0.125mm minimum trace and space because 0.1 can't be
done at that copper thickness.
2) Designers preference: I like to move to larger traces and spaces when
the component spacing allows. Apart from a mild optimization on current
carrying capacity and capacitive coupling, there is not a big technical
reason; it's just the way I like to do things.
Both of these things have me manually changing the default netclass
clearance constantly, and when I forget to change it back to the larger
trace and space I have to redo chunks of layout. Happens more often that
I'd like to admit. A sign of aging I guess.
Running the DRC I first do a pass at the lowest clearance, and then
(doing this now) run the same DRC on a larger clearance and check each
error to see if it's real (many are) or allowed for the layer and
location manually.
There's a lot of ways to approach this issue and a 'good' way to do this
has not occured to me yet. Meanwhile I have work to do. I'm seeing a big
chunk of work in 2013 by Dick on the netclass and vaguely remember
clearance being as settable as trace width once upon a time.
Pulling forward the old clearance setting widgets and possibly allow
specifying layers for the DRC are what I'm looking at doing in my
personal branch. Probably add a 'netclass' default entry in the
clearance dropdown I am remembering
All this to ask, does anyone else have issues with the netclass approach
to clearance and would the mainline want an integration of both netclass
and manually set clearances?
-hauptmech
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