> On Dec 19, 2017, at 12:06 AM, Marco Ciampa <ciam...@libero.it> wrote:
>
>
>> If you define an alias called MEMORY, you can then define *multiple
>> different* memory buses, so they have to have different prefix names. But
>> you can also choose to use aliases *without* a prefix name, and then
>> everywhere you use that alias will be part of the same set of nets.
>>
>> So, a more realistic and simple example would be:
>>
>> Define alias "USB" containing "DP", "DM"
>
> Ok
>
> If I do not see this definition somewhere on the sheet, am I still able
> to understand the schematics just looking at a print on paper of it?
>
> If I need to see also the "alias" definition to understand the
> schematics, where can I look at this template definition on the sheets?
>
>> Now in one sheet you have a USB hub. You can define four different buses
>> with names and the alias, and get nets like "PORT1.DP" and so on.
>>
>> But on a simpler design, you might not need four ports, so you can just use
>> "{USB}" in your bus name and get nets without any prefix.
>
> But it seems to me that this is the same name of a net on the bus with
> name "USB"...
I think that this whole bus alias thing will work in the way you want — “still
able to understand the schematics just by looking at a print on paper of it”
because at some point, you need to use bus rippers to connect individual
signals in the bus to pins on a connector or IC or other component. And those
bus rippers will connect to nets that have fully-qualified names that will make
sense, assuming the designer gave them sensible names.
-a
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