I't looks to me that logic update rate (then gpsim processors) is actually
1e6, then 1 MHz.. is this correct?
What is the actual behaivor of logic update rates?
i think the qtimer is at 1KHz, but the loops inside every call aren't
sinchonized... i mean: logic updates are done 1e6 times/Sec, but not at 1us
steps... isn't it?, not sure about this.
Looks to me that logic updates are done 1000 times/ms, but may be that all
1000 updates could be done in the firsts 100 us, for example. Is this right?
What is the upper limit to logic updatre rate?, tried with 5e6 with a pic
simulation and looks unstable.
I don't know if this is a bug or what:
When i add a clock input to the circuit at 1Hz i have a 0.25 Hz signal... is
this a problem of the clock input component, or the timming, or is my PC?
Do you also have 0.25 Hz?
The extrange thing for me is that at 5e6 i still have a 0.25 Hz signal in
the clock input, but if i run the pic then it goes faster but irregular...
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