Casey, On Wed, Mar 28, 2007 at 01:02:47PM -0400, Casey Jeffery wrote: > I was messing around with using the perf counters a couple weeks ago > as a way to get deterministic exits in the instruction stream of the > guest. I used the h/w msr save/restore area to disable the counters > and save the values on guest exit and restore them on entry. I also > set up the LVT to deliver NMI's on overflow. > You mean the host APIC LVT vector?
> This basically worked as expected, but I never got around the problem > of inconsistent NMI delivery. A large majority of the time the NMI > would be delivered in non-root mode and a vmexit would occur, as > expected. Occasionally, though the NMI is delivered in root mode. It > seems if the overflow occurs near the time a vmexit occurs for some > other reason, the NMI takes long enough to propagate that it's > delivered in root mode. > In my tests, I have setup perfmon to use a regular interrupt vector (0xee). I have not yet played with NMI. This is in general more difficult to handle, although, from Avi's comments, it looks like I could have caught the interrupt more easily in KVM. There may be some propagation delay yet you, supposedly, do not suffer from masked interrupt windows. Also something to watch out for is that when you restore you must make sure that msrs upper bits are set to 1. Otherwise you may trigger unvoluntary interrupts. -- -Stephane ------------------------------------------------------------------------- Take Surveys. Earn Cash. Influence the Future of IT Join SourceForge.net's Techsay panel and you'll get the chance to share your opinions on IT & business topics through brief surveys-and earn cash http://www.techsay.com/default.php?page=join.php&p=sourceforge&CID=DEVDEV _______________________________________________ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
