Dor Laor wrote:
>>>> This is for the TPR right?  VT has special logic to handle TPR
>>>> virtualization doesn't it?  I thought SVM did too...
>>>>
>>>>         
>>> Yes, the TPR.  Both VT and SVM virtualize CR8 in 64-bit mode.  SVM
>>> also supports CR8 in 32-bit mode through a nwe instruction encoding,
>>> but
>>> nobody uses that to my knowledge.  Maybe some brave soul can hack kvm
>>> to patch the new instruction in place of the mmio instruction Windows
>>> uses
>>> to bang on the tpr.
>>>       
>> Actually VT has virtual TPR support that does not require CR8. We
>> submitted a patch for Xen. Please see
>> http://lists.xensource.com/archives/html/xen-devel/2007-03/msg00993.htm
>>     
> l
>   
>> The spec should be available soon. We are working on a patch for KVM.
>>
>> Jun
>>     
>
> That's superb! Windows gives us really bad time with all of those TPR
> accesses. Because of that we currently prefer of using the non-acpi HAL.
>
> On what version on chip is this feature supported?
>
> This pushes towards in kernel apic too. Can't see how we avoid it.
>   

Does it really?  IIUC, we would avoid TPR traps entirely and would just 
need to synchronize the TPR whenever we go down to userspace.

Regards,

Anthony Liguori



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