Carsten Otte wrote: > >> An example: suppose host pfn 7 is allocated as guest pfn 8 (and >> therefore, userspace address 0x8000). Suppose further the guest maps >> guest pfn 8 to guest virtual 0x10000 and guest virtal 0x11000. >> Aren't there three tlbs you need to shoot down? host virtual >> 0x8000->pfn 7 and guest virual 0x10000->pfn 7 and 0x11000->pfn 7? > So far, we have a 1:1 mapping between guest physical and host > userspace. A userspace pointer equals a guest real pointer. > Our hardware control block for vcpu also allows to set an offset > "guest physical + offset = host user". The CPU knows about this offset > when doing page translations, and this is also transparent with regard > to tlb entries. > Now if the guest itself enables dynamic address translation, the tlb > entry can cache information about both page translation steps. This > process is transparent for both guest and host operating system. If > the host flushes this tlb entry, the information about the guest > internal translation is also removed.
Interesting. And if you have multiple guest virtual to guest physical translations, the hardware knows to flush them when the host virtual to host physical entry is flushed? [I neglected to mention npt/ept. For that, you can't keep an rmap, so you need to flush the entire guest tlb on a swapout. You might avoid it if the hardware updates the page accessed bit in the tlb (I think AMD does, not sure about Intel).] -- error compiling committee.c: too many arguments to function ------------------------------------------------------------------------- This SF.net email is sponsored by DB2 Express Download DB2 Express C - the FREE version of DB2 express and take control of your XML. No limits. Just data. Click to get it now. http://sourceforge.net/powerbar/db2/ _______________________________________________ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
