Dong, Eddie wrote:
> Avi Kivity wrote:
>   
>> Gregory Haskins wrote:
>>     
>>> 1) KVM_ISA_INTERRUPT:  In level-1 mode, this API allows the userspace
>>> pic to dispatch a vector to the kernel.  In level-2 mode, this allows
>>> any userspace app to tickle an isa based irq line (which feeds into
>>> the inputs of the PIC and IOAPIC.  In other words, a level-2 based
>>> userspace would substitute KVM_ISA_INTERRUPT for pic_set_irq().
>>>
>>>
>>>       
>> Wait. Looks like APIs are changing meaning according to some mode.
>> Confusion. 
>>
>> How about:
>>
>> KVM_INTERRUPT == inject this vector now
>> KVM_EXTINT == drives the processor's interrupt pin (this is handled by
>> the lapic code). input is a vector and type
>> KVM_ISA_INTERRUPT == drives the irq inputs to the PIC. Input
>> is line number.
>> KVM_IOAPIC_INTERRUPT == drives the irq inputs to the IOAPIC. Input is
>> line number. KVM_APIC_MESSAGE == do something to the apic
>>
>> That way, there is no mode (at least in the code), and the APIs keep
>> their meaning. 
>>
>> Note that if an irq line is wired to both the ioapic and the
>> PIC, we may
>> be better off having a single ioctl that can combine the ISA
>> and IOAPIC
>> variants (driving two inputs at once).
>>
>> Eddie, is that what you were driving at in your simplification
>> attempt? 
>>
>>     
> Yes, some minor thing:
> KVM_ISA_INTERRUPT: Per VM I/F, and need an irq line and irq level.
> KVM_IOAPIC_INTERRUPT: Per VM I/F, may also need irq level for level
> triggered irq.
> KVM_APIC_MESSAGE: Per VCPU I/F
>
> Per step by step approach way, KVM_EXTINT (assume for LINT0/LINT1) can
> be deferred to future implementation.
>
> The PIC patch currently implemented KVM_ISA_INTERRUPT (original named
> KVM_SET_ISA_IRQ_LEVEL). Need to confirm for the name considering level
> information in the cmmand.
>   

If we add a chip ID, then KVM_SET_IRQ_LEVEL is best.  If not, then
KVM_SET_ISA_IRQ_LEVEL is better.


-- 
Do not meddle in the internals of kernels, for they are subtle and quick to 
panic.


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