He, Qing wrote:
As discussed previously, this patch directly passes SMP CPU count to the
guest BIOS from CMOS by qemu, instead of sending SIPI and wait. CMOS
offset 0x7f is used.
This is the last functional piece for in-kernel APIC merge in kvm-37.
Signed-off-by: Qing He <[EMAIL PROTECTED]>
diff --git a/bios/rombios32.c b/bios/rombios32.c
index faf771e..3bb5e00 100755
--- a/bios/rombios32.c
+++ b/bios/rombios32.c
@@ -41,6 +41,9 @@ typedef unsigned long long uint64_t;
/* define it if the (emulated) hardware supports SMM mode */
#define BX_USE_SMM
+/* read CPU count from CMOS directly instead of probing */
+#define BX_CMOS_CPU_COUNT
+
#define cpuid(index, eax, ebx, ecx, edx) \
asm volatile ("cpuid" \
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) \
@@ -442,9 +445,13 @@ void smp_probe(void)
sipi_vector = AP_BOOT_ADDR >> 12;
writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
+#ifdef BX_CMOS_CPU_COUNT
+ smp_cpus = cmos_readb(0x7f);
+#else
delay_ms(10);
smp_cpus = readw((void *)CPU_COUNT_ADDR);
+#endif
This means there's no BIOS SIPI, which is a little sad as it doesn't
exercise the lapic machinery.
diff --git a/qemu/hw/mc146818rtc.c b/qemu/hw/mc146818rtc.c
index bad4cbd..3c4c25d 100644
--- a/qemu/hw/mc146818rtc.c
+++ b/qemu/hw/mc146818rtc.c
@@ -33,6 +33,9 @@
#define RTC_HOURS_ALARM 5
#define RTC_ALARM_DONT_CARE 0xC0
+/* KVM specific extension: smp cpu count passing */
+#define RTC_CMOS_CPU_COUNT 0x7f
+
#define RTC_DAY_OF_WEEK 6
#define RTC_DAY_OF_MONTH 7
#define RTC_MONTH 8
@@ -356,6 +359,9 @@ static uint32_t cmos_ioport_read(void *opaque,
uint32_t addr)
pic_set_irq(s->irq, 0);
s->cmos_data[RTC_REG_C] = 0x00;
break;
+ case RTC_CMOS_CPU_COUNT:
+ ret = smp_cpus;
+ break;
This really shouldn't be done from within the rtc.
Alternative patch attached, but works only with -no-kvm-irqchip.
--
error compiling committee.c: too many arguments to function
diff --git a/bios/BIOS-bochs-latest b/bios/BIOS-bochs-latest
index 4388ff2..c10ae62 100644
Binary files a/bios/BIOS-bochs-latest and b/bios/BIOS-bochs-latest differ
diff --git a/bios/BIOS-bochs-legacy b/bios/BIOS-bochs-legacy
index a720312..131e62b 100644
Binary files a/bios/BIOS-bochs-legacy and b/bios/BIOS-bochs-legacy differ
diff --git a/bios/rombios32.c b/bios/rombios32.c
index 816e5cc..1917b1c 100755
--- a/bios/rombios32.c
+++ b/bios/rombios32.c
@@ -441,7 +441,12 @@ void smp_probe(void)
sipi_vector = AP_BOOT_ADDR >> 12;
writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
+#ifndef BX_QEMU
delay_ms(10);
+#else
+ while (cmos_readb(0x5f) + 1 != readw((void *)CPU_COUNT_ADDR))
+ ;
+#endif
smp_cpus = readw((void *)CPU_COUNT_ADDR);
}
diff --git a/qemu/hw/pc.c b/qemu/hw/pc.c
index d3b8786..7c6ceb1 100644
--- a/qemu/hw/pc.c
+++ b/qemu/hw/pc.c
@@ -163,7 +163,7 @@ static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
}
/* hd_table must contain 4 block drivers */
-static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, int boot_device, BlockDriverState **hd_table)
+static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, int boot_device, BlockDriverState **hd_table, int smp_cpus)
{
RTCState *s = rtc_state;
int val;
@@ -190,6 +190,7 @@ static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, int boo
rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
rtc_set_memory(s, 0x5d, above_4g_mem_size >> 32);
}
+ rtc_set_memory(s, 0x5f, smp_cpus - 1);
if (ram_size > (16 * 1024 * 1024))
val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
@@ -778,7 +779,7 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size, int boot_device,
floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
- cmos_init(ram_size, above_4g_mem_size, boot_device, bs_table);
+ cmos_init(ram_size, above_4g_mem_size, boot_device, bs_table, smp_cpus);
if (pci_enabled && usb_enabled) {
usb_uhci_init(pci_bus, piix3_devfn + 2);
diff --git a/qemu/pc-bios/bios.bin b/qemu/pc-bios/bios.bin
index 4388ff2..c10ae62 100644
Binary files a/qemu/pc-bios/bios.bin and b/qemu/pc-bios/bios.bin differ
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