Aurelien Jarno a écrit : > Avi Kivity a écrit : >> >> But invlpg is defined as having reg == 7! The manual says: >> >> 0F 01/7 INVLPG m >> >> where "/7" is the notation for "reg in the mod reg r/m byte: >> >> " /digit — A digit between 0 and 7 indicates that the ModR/M byte of the >> instruction uses >> only the r/m (register or memory) operand. The reg field contains the >> digit that provides an >> extension to the instruction's opcode." >> >> >> So what you're seeing is not the invlpg instruction but something else >> in the same group. >> > > I see. > > Anyway the previous behaviour on AMD was to disable SrcMem on all 0F 01 > instructions. It's actually what I tried to do in the first version of > the patch, ie have the same behaviour as the SrcNone case for the 0F 01 > instructions. > > The 0F 01 instruction is then correctly emulated, but another of this Oops s/0F 01/invlpg/ > group is probably not, as the patch clearly fix the problem on AMD.
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